timer64.txt 611 B

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  1. Timer64
  2. -------
  3. The timer64 node describes C6X event timers.
  4. Required properties:
  5. - compatible: must be "ti,c64x+timer64"
  6. - reg: base address and size of register region
  7. - interrupt-parent: interrupt controller
  8. - interrupts: interrupt id
  9. Optional properties:
  10. - ti,dscr-dev-enable: Device ID used to enable timer IP through DSCR interface.
  11. - ti,core-mask: on multi-core SoCs, bitmask of cores allowed to use this timer.
  12. Example:
  13. timer0: timer@25e0000 {
  14. compatible = "ti,c64x+timer64";
  15. ti,core-mask = < 0x01 >;
  16. reg = <0x25e0000 0x40>;
  17. interrupt-parent = <&megamod_pic>;
  18. interrupts = < 16 >;
  19. };