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- Device Tree Clock bindings for Calxeda highbank platform
- This binding uses the common clock binding[1].
- [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
- Required properties:
- - compatible : shall be one of the following:
- "calxeda,hb-pll-clock" - for a PLL clock
- "calxeda,hb-a9periph-clock" - The A9 peripheral clock divided from the
- A9 clock.
- "calxeda,hb-a9bus-clock" - The A9 bus clock divided from the A9 clock.
- "calxeda,hb-emmc-clock" - Divided clock for MMC/SD controller.
- - reg : shall be the control register offset from SYSREGs base for the clock.
- - clocks : shall be the input parent clock phandle for the clock. This is
- either an oscillator or a pll output.
- - #clock-cells : from common clock binding; shall be set to 0.
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