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- Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller
- The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB.
- Required Properties:
- - compatible: has to be "qca,<soctype>-cpu-intc" and one of the following
- fallbacks:
- - "qca,ar7100-pll"
- - "qca,ar7240-pll"
- - "qca,ar9130-pll"
- - "qca,ar9330-pll"
- - "qca,ar9340-pll"
- - "qca,qca9550-pll"
- - reg: Base address and size of the controllers memory area
- - clock-names: Name of the input clock, has to be "ref"
- - clocks: phandle of the external reference clock
- - #clock-cells: has to be one
- Optional properties:
- - clock-output-names: should be "cpu", "ddr", "ahb"
- Example:
- memory-controller@18050000 {
- compatible = "qca,ar9132-ppl", "qca,ar9130-pll";
- reg = <0x18050000 0x20>;
- clock-names = "ref";
- clocks = <&extosc>;
- #clock-cells = <1>;
- clock-output-names = "cpu", "ddr", "ahb";
- };
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