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- Binding for a ST pre-divider clock driver.
- This binding uses the common clock binding[1].
- Base address is located to the parent node. See clock binding[2]
- [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
- [2] Documentation/devicetree/bindings/clock/st/st,clkgen.txt
- Required properties:
- - compatible : shall be:
- "st,clkgena-prediv-c65", "st,clkgena-prediv"
- "st,clkgena-prediv-c32", "st,clkgena-prediv"
- - #clock-cells : From common clock binding; shall be set to 0.
- - clocks : From common clock binding
- - clock-output-names : From common clock binding.
- Example:
- clockgen-a@fd345000 {
- reg = <0xfd345000 0xb50>;
- clk_m_a2_osc_prediv: clk-m-a2-osc-prediv {
- #clock-cells = <0>;
- compatible = "st,clkgena-prediv-c32",
- "st,clkgena-prediv";
- clocks = <&clk_sysin>;
- clock-output-names = "clk-m-a2-osc-prediv";
- };
- };
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