vf610-clock.txt 1.2 KB

1234567891011121314151617181920212223242526272829303132333435363738394041
  1. * Clock bindings for Freescale Vybrid VF610 SOC
  2. Required properties:
  3. - compatible: Should be "fsl,vf610-ccm"
  4. - reg: Address and length of the register set
  5. - #clock-cells: Should be <1>
  6. Optional properties:
  7. - clocks: list of clock identifiers which are external input clocks to the
  8. given clock controller. Please refer the next section to find
  9. the input clocks for a given controller.
  10. - clock-names: list of names of clocks which are exteral input clocks to the
  11. given clock controller.
  12. Input clocks for top clock controller:
  13. - sxosc (external crystal oscillator 32KHz, recommended)
  14. - fxosc (external crystal oscillator 24MHz, recommended)
  15. - audio_ext
  16. - enet_ext
  17. The clock consumer should specify the desired clock by having the clock
  18. ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
  19. for the full list of VF610 clock IDs.
  20. Examples:
  21. clks: ccm@4006b000 {
  22. compatible = "fsl,vf610-ccm";
  23. reg = <0x4006b000 0x1000>;
  24. #clock-cells = <1>;
  25. clocks = <&sxosc>, <&fxosc>;
  26. clock-names = "sxosc", "fxosc";
  27. };
  28. uart1: serial@40028000 {
  29. compatible = "fsl,vf610-uart";
  30. reg = <0x40028000 0x1000>;
  31. interrupts = <0 62 0x04>;
  32. clocks = <&clks VF610_CLK_UART1>;
  33. clock-names = "ipg";
  34. };