fsl-sec6.txt 4.3 KB

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  1. SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
  2. Currently Freescale powerpc chip C29X is embedded with SEC 6.
  3. SEC 6 device tree binding include:
  4. -SEC 6 Node
  5. -Job Ring Node
  6. -Full Example
  7. =====================================================================
  8. SEC 6 Node
  9. Description
  10. Node defines the base address of the SEC 6 block.
  11. This block specifies the address range of all global
  12. configuration registers for the SEC 6 block.
  13. For example, In C293, we could see three SEC 6 node.
  14. PROPERTIES
  15. - compatible
  16. Usage: required
  17. Value type: <string>
  18. Definition: Must include "fsl,sec-v6.0".
  19. - fsl,sec-era
  20. Usage: optional
  21. Value type: <u32>
  22. Definition: A standard property. Define the 'ERA' of the SEC
  23. device.
  24. - #address-cells
  25. Usage: required
  26. Value type: <u32>
  27. Definition: A standard property. Defines the number of cells
  28. for representing physical addresses in child nodes.
  29. - #size-cells
  30. Usage: required
  31. Value type: <u32>
  32. Definition: A standard property. Defines the number of cells
  33. for representing the size of physical addresses in
  34. child nodes.
  35. - reg
  36. Usage: required
  37. Value type: <prop-encoded-array>
  38. Definition: A standard property. Specifies the physical
  39. address and length of the SEC 6 configuration registers.
  40. - ranges
  41. Usage: required
  42. Value type: <prop-encoded-array>
  43. Definition: A standard property. Specifies the physical address
  44. range of the SEC 6.0 register space (-SNVS not included). A
  45. triplet that includes the child address, parent address, &
  46. length.
  47. Note: All other standard properties (see the ePAPR) are allowed
  48. but are optional.
  49. EXAMPLE
  50. crypto@a0000 {
  51. compatible = "fsl,sec-v6.0";
  52. fsl,sec-era = <6>;
  53. #address-cells = <1>;
  54. #size-cells = <1>;
  55. reg = <0xa0000 0x20000>;
  56. ranges = <0 0xa0000 0x20000>;
  57. };
  58. =====================================================================
  59. Job Ring (JR) Node
  60. Child of the crypto node defines data processing interface to SEC 6
  61. across the peripheral bus for purposes of processing
  62. cryptographic descriptors. The specified address
  63. range can be made visible to one (or more) cores.
  64. The interrupt defined for this node is controlled within
  65. the address range of this node.
  66. - compatible
  67. Usage: required
  68. Value type: <string>
  69. Definition: Must include "fsl,sec-v6.0-job-ring".
  70. - reg
  71. Usage: required
  72. Value type: <prop-encoded-array>
  73. Definition: Specifies a two JR parameters: an offset from
  74. the parent physical address and the length the JR registers.
  75. - interrupts
  76. Usage: required
  77. Value type: <prop_encoded-array>
  78. Definition: Specifies the interrupts generated by this
  79. device. The value of the interrupts property
  80. consists of one interrupt specifier. The format
  81. of the specifier is defined by the binding document
  82. describing the node's interrupt parent.
  83. EXAMPLE
  84. jr@1000 {
  85. compatible = "fsl,sec-v6.0-job-ring";
  86. reg = <0x1000 0x1000>;
  87. interrupts = <49 2 0 0>;
  88. };
  89. ===================================================================
  90. Full Example
  91. Since some chips may contain more than one SEC, the dtsi contains
  92. only the node contents, not the node itself. A chip using the SEC
  93. should include the dtsi inside each SEC node. Example:
  94. In qoriq-sec6.0.dtsi:
  95. compatible = "fsl,sec-v6.0";
  96. fsl,sec-era = <6>;
  97. #address-cells = <1>;
  98. #size-cells = <1>;
  99. jr@1000 {
  100. compatible = "fsl,sec-v6.0-job-ring",
  101. "fsl,sec-v5.2-job-ring",
  102. "fsl,sec-v5.0-job-ring",
  103. "fsl,sec-v4.4-job-ring",
  104. "fsl,sec-v4.0-job-ring";
  105. reg = <0x1000 0x1000>;
  106. };
  107. jr@2000 {
  108. compatible = "fsl,sec-v6.0-job-ring",
  109. "fsl,sec-v5.2-job-ring",
  110. "fsl,sec-v5.0-job-ring",
  111. "fsl,sec-v4.4-job-ring",
  112. "fsl,sec-v4.0-job-ring";
  113. reg = <0x2000 0x1000>;
  114. };
  115. In the C293 device tree, we add the include of public property:
  116. crypto@a0000 {
  117. /include/ "qoriq-sec6.0.dtsi"
  118. }
  119. crypto@a0000 {
  120. reg = <0xa0000 0x20000>;
  121. ranges = <0 0xa0000 0x20000>;
  122. jr@1000 {
  123. interrupts = <49 2 0 0>;
  124. };
  125. jr@2000 {
  126. interrupts = <50 2 0 0>;
  127. };
  128. };