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- Picochip picoXcell SPAcc (Security Protocol Accelerator) bindings
- Picochip picoXcell devices contain crypto offload engines that may be used for
- IPSEC and femtocell layer 2 ciphering.
- Required properties:
- - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine
- "picochip,spacc-l2" for the femtocell layer 2 ciphering engine.
- - reg : Offset and length of the register set for this device
- - interrupt-parent : The interrupt controller that controls the SPAcc
- interrupt.
- - interrupts : The interrupt line from the SPAcc.
- - ref-clock : The input clock that drives the SPAcc.
- Example SPAcc node:
- spacc@10000 {
- compatible = "picochip,spacc-ipsec";
- reg = <0x100000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <24>;
- ref-clock = <&ipsec_clk>, "ref";
- };
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