exynos5433-decon.txt 2.4 KB

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  1. Device-Tree bindings for Samsung Exynos SoC display controller (DECON)
  2. DECON (Display and Enhancement Controller) is the Display Controller for the
  3. Exynos series of SoCs which transfers the image data from a video memory
  4. buffer to an external LCD interface.
  5. Required properties:
  6. - compatible: value should be "samsung,exynos5433-decon";
  7. - reg: physical base address and length of the DECON registers set.
  8. - interrupts: should contain a list of all DECON IP block interrupts in the
  9. order: VSYNC, LCD_SYSTEM. The interrupt specifier format
  10. depends on the interrupt controller used.
  11. - interrupt-names: should contain the interrupt names: "vsync", "lcd_sys"
  12. in the same order as they were listed in the interrupts
  13. property.
  14. - clocks: must include clock specifiers corresponding to entries in the
  15. clock-names property.
  16. - clock-names: list of clock names sorted in the same order as the clocks
  17. property. Must contain "aclk_decon", "aclk_smmu_decon0x",
  18. "aclk_xiu_decon0x", "pclk_smmu_decon0x", clk_decon_vclk",
  19. "sclk_decon_eclk"
  20. - ports: contains a port which is connected to mic node. address-cells and
  21. size-cells must 1 and 0, respectively.
  22. - port: contains an endpoint node which is connected to the endpoint in the mic
  23. node. The reg value muset be 0.
  24. - i80-if-timings: specify whether the panel which is connected to decon uses
  25. i80 lcd interface or mipi video interface. This node contains
  26. no timing information as that of fimd does. Because there is
  27. no register in decon to specify i80 interface timing value,
  28. it is not needed, but make it remain to use same kind of node
  29. in fimd and exynos7 decon.
  30. Example:
  31. SoC specific DT entry:
  32. decon: decon@13800000 {
  33. compatible = "samsung,exynos5433-decon";
  34. reg = <0x13800000 0x2104>;
  35. clocks = <&cmu_disp CLK_ACLK_DECON>, <&cmu_disp CLK_ACLK_SMMU_DECON0X>,
  36. <&cmu_disp CLK_ACLK_XIU_DECON0X>,
  37. <&cmu_disp CLK_PCLK_SMMU_DECON0X>,
  38. <&cmu_disp CLK_SCLK_DECON_VCLK>,
  39. <&cmu_disp CLK_SCLK_DECON_ECLK>;
  40. clock-names = "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x",
  41. "pclk_smmu_decon0x", "sclk_decon_vclk", "sclk_decon_eclk";
  42. interrupt-names = "vsync", "lcd_sys";
  43. interrupts = <0 202 0>, <0 203 0>;
  44. ports {
  45. #address-cells = <1>;
  46. #size-cells = <0>;
  47. port@0 {
  48. reg = <0>;
  49. decon_to_mic: endpoint {
  50. remote-endpoint = <&mic_to_decon>;
  51. };
  52. };
  53. };
  54. };
  55. Board specific DT entry:
  56. &decon {
  57. i80-if-timings {
  58. };
  59. };