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- Qualcomm adreno/snapdragon display controller
- Required properties:
- - compatible:
- * "qcom,mdp" - mdp4
- - reg: Physical base address and length of the controller's registers.
- - interrupts: The interrupt signal from the display controller.
- - connectors: array of phandles for output device(s)
- - clocks: device clocks
- See ../clocks/clock-bindings.txt for details.
- - clock-names: the following clocks are required:
- * "core_clk"
- * "iface_clk"
- * "src_clk"
- * "hdmi_clk"
- * "mpd_clk"
- Optional properties:
- - gpus: phandle for gpu device
- - clock-names: the following clocks are optional:
- * "lut_clk"
- Example:
- / {
- ...
- mdp: qcom,mdp@5100000 {
- compatible = "qcom,mdp";
- reg = <0x05100000 0xf0000>;
- interrupts = <GIC_SPI 75 0>;
- connectors = <&hdmi>;
- gpus = <&gpu>;
- clock-names =
- "core_clk",
- "iface_clk",
- "lut_clk",
- "src_clk",
- "hdmi_clk",
- "mdp_clk";
- clocks =
- <&mmcc MDP_SRC>,
- <&mmcc MDP_AHB_CLK>,
- <&mmcc MDP_LUT_CLK>,
- <&mmcc TV_SRC>,
- <&mmcc HDMI_TV_CLK>,
- <&mmcc MDP_TV_CLK>;
- };
- };
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