fsl-imx-sdma.txt 2.0 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485
  1. * Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
  2. Required properties:
  3. - compatible : Should be one of
  4. "fsl,imx25-sdma"
  5. "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
  6. "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
  7. "fsl,imx51-sdma"
  8. "fsl,imx53-sdma"
  9. "fsl,imx6q-sdma"
  10. The -to variants should be preferred since they allow to determine the
  11. correct ROM script addresses needed for the driver to work without additional
  12. firmware.
  13. - reg : Should contain SDMA registers location and length
  14. - interrupts : Should contain SDMA interrupt
  15. - #dma-cells : Must be <3>.
  16. The first cell specifies the DMA request/event ID. See details below
  17. about the second and third cell.
  18. - fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM
  19. scripts firmware
  20. The second cell of dma phandle specifies the peripheral type of DMA transfer.
  21. The full ID of peripheral types can be found below.
  22. ID transfer type
  23. ---------------------
  24. 0 MCU domain SSI
  25. 1 Shared SSI
  26. 2 MMC
  27. 3 SDHC
  28. 4 MCU domain UART
  29. 5 Shared UART
  30. 6 FIRI
  31. 7 MCU domain CSPI
  32. 8 Shared CSPI
  33. 9 SIM
  34. 10 ATA
  35. 11 CCM
  36. 12 External peripheral
  37. 13 Memory Stick Host Controller
  38. 14 Shared Memory Stick Host Controller
  39. 15 DSP
  40. 16 Memory
  41. 17 FIFO type Memory
  42. 18 SPDIF
  43. 19 IPU Memory
  44. 20 ASRC
  45. 21 ESAI
  46. 22 SSI Dual FIFO (needs firmware ver >= 2)
  47. 23 Shared ASRC
  48. 24 SAI
  49. The third cell specifies the transfer priority as below.
  50. ID transfer priority
  51. -------------------------
  52. 0 High
  53. 1 Medium
  54. 2 Low
  55. Examples:
  56. sdma@83fb0000 {
  57. compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
  58. reg = <0x83fb0000 0x4000>;
  59. interrupts = <6>;
  60. #dma-cells = <3>;
  61. fsl,sdma-ram-script-name = "sdma-imx51.bin";
  62. };
  63. DMA clients connected to the i.MX SDMA controller must use the format
  64. described in the dma.txt file.
  65. Examples:
  66. ssi2: ssi@70014000 {
  67. compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
  68. reg = <0x70014000 0x4000>;
  69. interrupts = <30>;
  70. clocks = <&clks 49>;
  71. dmas = <&sdma 24 1 0>,
  72. <&sdma 25 1 0>;
  73. dma-names = "rx", "tx";
  74. fsl,fifo-depth = <15>;
  75. };