snps-dma.txt 2.0 KB

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  1. * Synopsys Designware DMA Controller
  2. Required properties:
  3. - compatible: "snps,dma-spear1340"
  4. - reg: Address range of the DMAC registers
  5. - interrupt: Should contain the DMAC interrupt number
  6. - dma-channels: Number of channels supported by hardware
  7. - dma-requests: Number of DMA request lines supported, up to 16
  8. - dma-masters: Number of AHB masters supported by the controller
  9. - #dma-cells: must be <3>
  10. - chan_allocation_order: order of allocation of channel, 0 (default): ascending,
  11. 1: descending
  12. - chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1:
  13. increase from chan n->0
  14. - block_size: Maximum block size supported by the controller
  15. - data_width: Maximum data width supported by hardware per AHB master
  16. (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
  17. Optional properties:
  18. - interrupt-parent: Should be the phandle for the interrupt controller
  19. that services interrupts for this device
  20. - is_private: The device channels should be marked as private and not for by the
  21. general purpose DMA channel allocator. False if not passed.
  22. Example:
  23. dmahost: dma@fc000000 {
  24. compatible = "snps,dma-spear1340";
  25. reg = <0xfc000000 0x1000>;
  26. interrupt-parent = <&vic1>;
  27. interrupts = <12>;
  28. dma-channels = <8>;
  29. dma-requests = <16>;
  30. dma-masters = <2>;
  31. #dma-cells = <3>;
  32. chan_allocation_order = <1>;
  33. chan_priority = <1>;
  34. block_size = <0xfff>;
  35. data_width = <3 3>;
  36. };
  37. DMA clients connected to the Designware DMA controller must use the format
  38. described in the dma.txt file, using a four-cell specifier for each channel.
  39. The four cells in order are:
  40. 1. A phandle pointing to the DMA controller
  41. 2. The DMA request line number
  42. 3. Source master for transfers on allocated channel
  43. 4. Destination master for transfers on allocated channel
  44. Example:
  45. serial@e0000000 {
  46. compatible = "arm,pl011", "arm,primecell";
  47. reg = <0xe0000000 0x1000>;
  48. interrupts = <0 35 0x4>;
  49. status = "disabled";
  50. dmas = <&dmahost 12 0 1>,
  51. <&dmahost 13 1 0>;
  52. dma-names = "rx", "rx";
  53. };