tegra20-apbdma.txt 1.3 KB

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  1. * NVIDIA Tegra APB DMA controller
  2. Required properties:
  3. - compatible: Should be "nvidia,<chip>-apbdma"
  4. - reg: Should contain DMA registers location and length. This shuld include
  5. all of the per-channel registers.
  6. - interrupts: Should contain all of the per-channel DMA interrupts.
  7. - clocks: Must contain one entry, for the module clock.
  8. See ../clocks/clock-bindings.txt for details.
  9. - resets : Must contain an entry for each entry in reset-names.
  10. See ../reset/reset.txt for details.
  11. - reset-names : Must include the following entries:
  12. - dma
  13. - #dma-cells : Must be <1>. This dictates the length of DMA specifiers in
  14. client nodes' dmas properties. The specifier represents the DMA request
  15. select value for the peripheral. For more details, consult the Tegra TRM's
  16. documentation of the APB DMA channel control register REQ_SEL field.
  17. Examples:
  18. apbdma: dma@6000a000 {
  19. compatible = "nvidia,tegra20-apbdma";
  20. reg = <0x6000a000 0x1200>;
  21. interrupts = < 0 136 0x04
  22. 0 137 0x04
  23. 0 138 0x04
  24. 0 139 0x04
  25. 0 140 0x04
  26. 0 141 0x04
  27. 0 142 0x04
  28. 0 143 0x04
  29. 0 144 0x04
  30. 0 145 0x04
  31. 0 146 0x04
  32. 0 147 0x04
  33. 0 148 0x04
  34. 0 149 0x04
  35. 0 150 0x04
  36. 0 151 0x04 >;
  37. clocks = <&tegra_car 34>;
  38. resets = <&tegra_car 34>;
  39. reset-names = "dma";
  40. #dma-cells = <1>;
  41. };