xilinx-zynq-fpga-mgr.txt 560 B

12345678910111213141516171819
  1. Xilinx Zynq FPGA Manager
  2. Required properties:
  3. - compatible: should contain "xlnx,zynq-devcfg-1.0"
  4. - reg: base address and size for memory mapped io
  5. - interrupts: interrupt for the FPGA manager device
  6. - clocks: phandle for clocks required operation
  7. - clock-names: name for the clock, should be "ref_clk"
  8. - syscon: phandle for access to SLCR registers
  9. Example:
  10. devcfg: devcfg@f8007000 {
  11. compatible = "xlnx,zynq-devcfg-1.0";
  12. reg = <0xf8007000 0x100>;
  13. interrupts = <0 8 4>;
  14. clocks = <&clkc 12>;
  15. clock-names = "ref_clk";
  16. syscon = <&slcr>;
  17. };