i2c-rk3x.txt 1.7 KB

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  1. * Rockchip RK3xxx I2C controller
  2. This driver interfaces with the native I2C controller present in Rockchip
  3. RK3xxx SoCs.
  4. Required properties :
  5. - reg : Offset and length of the register set for the device
  6. - compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or
  7. "rockchip,rk3288-i2c".
  8. - interrupts : interrupt number
  9. - clocks : parent clock
  10. Required on RK3066, RK3188 :
  11. - rockchip,grf : the phandle of the syscon node for the general register
  12. file (GRF)
  13. - on those SoCs an alias with the correct I2C bus ID (bit offset in the GRF)
  14. is also required.
  15. Optional properties :
  16. - clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used.
  17. - i2c-scl-rising-time-ns : Number of nanoseconds the SCL signal takes to rise
  18. (t(r) in I2C specification). If not specified this is assumed to be
  19. the maximum the specification allows(1000 ns for Standard-mode,
  20. 300 ns for Fast-mode) which might cause slightly slower communication.
  21. - i2c-scl-falling-time-ns : Number of nanoseconds the SCL signal takes to fall
  22. (t(f) in the I2C specification). If not specified this is assumed to
  23. be the maximum the specification allows (300 ns) which might cause
  24. slightly slower communication.
  25. - i2c-sda-falling-time-ns : Number of nanoseconds the SDA signal takes to fall
  26. (t(f) in the I2C specification). If not specified we'll use the SCL
  27. value since they are the same in nearly all cases.
  28. Example:
  29. aliases {
  30. i2c0 = &i2c0;
  31. }
  32. i2c0: i2c@2002d000 {
  33. compatible = "rockchip,rk3188-i2c";
  34. reg = <0x2002d000 0x1000>;
  35. interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
  36. #address-cells = <1>;
  37. #size-cells = <0>;
  38. rockchip,grf = <&grf>;
  39. clock-names = "i2c";
  40. clocks = <&cru PCLK_I2C0>;
  41. i2c-scl-rising-time-ns = <800>;
  42. i2c-scl-falling-time-ns = <100>;
  43. };