samsung,s3c24xx-irq.txt 1.6 KB

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  1. Samsung S3C24XX Interrupt Controllers
  2. The S3C24XX SoCs contain a custom set of interrupt controllers providing a
  3. varying number of interrupt sources. The set consists of a main- and sub-
  4. controller and on newer SoCs even a second main controller.
  5. Required properties:
  6. - compatible: Compatible property value should be "samsung,s3c2410-irq"
  7. for machines before s3c2416 and "samsung,s3c2416-irq" for s3c2416 and later.
  8. - reg: Physical base address of the controller and length of memory mapped
  9. region.
  10. - interrupt-controller : Identifies the node as an interrupt controller
  11. - #interrupt-cells : Specifies the number of cells needed to encode an
  12. interrupt source. The value shall be 4 and interrupt descriptor shall
  13. have the following format:
  14. <ctrl_num parent_irq ctrl_irq type>
  15. ctrl_num contains the controller to use:
  16. - 0 ... main controller
  17. - 1 ... sub controller
  18. - 2 ... second main controller on s3c2416 and s3c2450
  19. parent_irq contains the parent bit in the main controller and will be
  20. ignored in main controllers
  21. ctrl_irq contains the interrupt bit of the controller
  22. type contains the trigger type to use
  23. Example:
  24. interrupt-controller@4a000000 {
  25. compatible = "samsung,s3c2410-irq";
  26. reg = <0x4a000000 0x100>;
  27. interrupt-controller;
  28. #interrupt-cells=<4>;
  29. };
  30. [...]
  31. serial@50000000 {
  32. compatible = "samsung,s3c2410-uart";
  33. reg = <0x50000000 0x4000>;
  34. interrupt-parent = <&subintc>;
  35. interrupts = <1 28 0 4>, <1 28 1 4>;
  36. };
  37. rtc@57000000 {
  38. compatible = "samsung,s3c2410-rtc";
  39. reg = <0x57000000 0x100>;
  40. interrupt-parent = <&intc>;
  41. interrupts = <0 30 0 3>, <0 8 0 3>;
  42. };