marvell.txt 16 KB

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  1. Marvell Discovery mv64[345]6x System Controller chips
  2. ===========================================================
  3. The Marvell mv64[345]60 series of system controller chips contain
  4. many of the peripherals needed to implement a complete computer
  5. system. In this section, we define device tree nodes to describe
  6. the system controller chip itself and each of the peripherals
  7. which it contains. Compatible string values for each node are
  8. prefixed with the string "marvell,", for Marvell Technology Group Ltd.
  9. 1) The /system-controller node
  10. This node is used to represent the system-controller and must be
  11. present when the system uses a system controller chip. The top-level
  12. system-controller node contains information that is global to all
  13. devices within the system controller chip. The node name begins
  14. with "system-controller" followed by the unit address, which is
  15. the base address of the memory-mapped register set for the system
  16. controller chip.
  17. Required properties:
  18. - ranges : Describes the translation of system controller addresses
  19. for memory mapped registers.
  20. - clock-frequency: Contains the main clock frequency for the system
  21. controller chip.
  22. - reg : This property defines the address and size of the
  23. memory-mapped registers contained within the system controller
  24. chip. The address specified in the "reg" property should match
  25. the unit address of the system-controller node.
  26. - #address-cells : Address representation for system controller
  27. devices. This field represents the number of cells needed to
  28. represent the address of the memory-mapped registers of devices
  29. within the system controller chip.
  30. - #size-cells : Size representation for the memory-mapped
  31. registers within the system controller chip.
  32. - #interrupt-cells : Defines the width of cells used to represent
  33. interrupts.
  34. Optional properties:
  35. - model : The specific model of the system controller chip. Such
  36. as, "mv64360", "mv64460", or "mv64560".
  37. - compatible : A string identifying the compatibility identifiers
  38. of the system controller chip.
  39. The system-controller node contains child nodes for each system
  40. controller device that the platform uses. Nodes should not be created
  41. for devices which exist on the system controller chip but are not used
  42. Example Marvell Discovery mv64360 system-controller node:
  43. system-controller@f1000000 { /* Marvell Discovery mv64360 */
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. model = "mv64360"; /* Default */
  47. compatible = "marvell,mv64360";
  48. clock-frequency = <133333333>;
  49. reg = <0xf1000000 0x10000>;
  50. virtual-reg = <0xf1000000>;
  51. ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
  52. 0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
  53. 0xa0000000 0xa0000000 0x4000000 /* User FLASH */
  54. 0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
  55. 0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
  56. [ child node definitions... ]
  57. }
  58. 2) Child nodes of /system-controller
  59. a) Marvell Discovery MDIO bus
  60. The MDIO is a bus to which the PHY devices are connected. For each
  61. device that exists on this bus, a child node should be created. See
  62. the definition of the PHY node below for an example of how to define
  63. a PHY.
  64. Required properties:
  65. - #address-cells : Should be <1>
  66. - #size-cells : Should be <0>
  67. - compatible : Should be "marvell,mv64360-mdio"
  68. Example:
  69. mdio {
  70. #address-cells = <1>;
  71. #size-cells = <0>;
  72. compatible = "marvell,mv64360-mdio";
  73. ethernet-phy@0 {
  74. ......
  75. };
  76. };
  77. b) Marvell Discovery ethernet controller
  78. The Discover ethernet controller is described with two levels
  79. of nodes. The first level describes an ethernet silicon block
  80. and the second level describes up to 3 ethernet nodes within
  81. that block. The reason for the multiple levels is that the
  82. registers for the node are interleaved within a single set
  83. of registers. The "ethernet-block" level describes the
  84. shared register set, and the "ethernet" nodes describe ethernet
  85. port-specific properties.
  86. Ethernet block node
  87. Required properties:
  88. - #address-cells : <1>
  89. - #size-cells : <0>
  90. - compatible : "marvell,mv64360-eth-block"
  91. - reg : Offset and length of the register set for this block
  92. Optional properties:
  93. - clocks : Phandle to the clock control device and gate bit
  94. Example Discovery Ethernet block node:
  95. ethernet-block@2000 {
  96. #address-cells = <1>;
  97. #size-cells = <0>;
  98. compatible = "marvell,mv64360-eth-block";
  99. reg = <0x2000 0x2000>;
  100. ethernet@0 {
  101. .......
  102. };
  103. };
  104. Ethernet port node
  105. Required properties:
  106. - compatible : Should be "marvell,mv64360-eth".
  107. - reg : Should be <0>, <1>, or <2>, according to which registers
  108. within the silicon block the device uses.
  109. - interrupts : <a> where a is the interrupt number for the port.
  110. - interrupt-parent : the phandle for the interrupt controller
  111. that services interrupts for this device.
  112. - phy : the phandle for the PHY connected to this ethernet
  113. controller.
  114. - local-mac-address : 6 bytes, MAC address
  115. Example Discovery Ethernet port node:
  116. ethernet@0 {
  117. compatible = "marvell,mv64360-eth";
  118. reg = <0>;
  119. interrupts = <32>;
  120. interrupt-parent = <&PIC>;
  121. phy = <&PHY0>;
  122. local-mac-address = [ 00 00 00 00 00 00 ];
  123. };
  124. c) Marvell Discovery PHY nodes
  125. Required properties:
  126. - interrupts : <a> where a is the interrupt number for this phy.
  127. - interrupt-parent : the phandle for the interrupt controller that
  128. services interrupts for this device.
  129. - reg : The ID number for the phy, usually a small integer
  130. Example Discovery PHY node:
  131. ethernet-phy@1 {
  132. compatible = "broadcom,bcm5421";
  133. interrupts = <76>; /* GPP 12 */
  134. interrupt-parent = <&PIC>;
  135. reg = <1>;
  136. };
  137. d) Marvell Discovery SDMA nodes
  138. Represent DMA hardware associated with the MPSC (multiprotocol
  139. serial controllers).
  140. Required properties:
  141. - compatible : "marvell,mv64360-sdma"
  142. - reg : Offset and length of the register set for this device
  143. - interrupts : <a> where a is the interrupt number for the DMA
  144. device.
  145. - interrupt-parent : the phandle for the interrupt controller
  146. that services interrupts for this device.
  147. Example Discovery SDMA node:
  148. sdma@4000 {
  149. compatible = "marvell,mv64360-sdma";
  150. reg = <0x4000 0xc18>;
  151. virtual-reg = <0xf1004000>;
  152. interrupts = <36>;
  153. interrupt-parent = <&PIC>;
  154. };
  155. e) Marvell Discovery BRG nodes
  156. Represent baud rate generator hardware associated with the MPSC
  157. (multiprotocol serial controllers).
  158. Required properties:
  159. - compatible : "marvell,mv64360-brg"
  160. - reg : Offset and length of the register set for this device
  161. - clock-src : A value from 0 to 15 which selects the clock
  162. source for the baud rate generator. This value corresponds
  163. to the CLKS value in the BRGx configuration register. See
  164. the mv64x60 User's Manual.
  165. - clock-frequence : The frequency (in Hz) of the baud rate
  166. generator's input clock.
  167. - current-speed : The current speed setting (presumably by
  168. firmware) of the baud rate generator.
  169. Example Discovery BRG node:
  170. brg@b200 {
  171. compatible = "marvell,mv64360-brg";
  172. reg = <0xb200 0x8>;
  173. clock-src = <8>;
  174. clock-frequency = <133333333>;
  175. current-speed = <9600>;
  176. };
  177. f) Marvell Discovery CUNIT nodes
  178. Represent the Serial Communications Unit device hardware.
  179. Required properties:
  180. - reg : Offset and length of the register set for this device
  181. Example Discovery CUNIT node:
  182. cunit@f200 {
  183. reg = <0xf200 0x200>;
  184. };
  185. g) Marvell Discovery MPSCROUTING nodes
  186. Represent the Discovery's MPSC routing hardware
  187. Required properties:
  188. - reg : Offset and length of the register set for this device
  189. Example Discovery CUNIT node:
  190. mpscrouting@b500 {
  191. reg = <0xb400 0xc>;
  192. };
  193. h) Marvell Discovery MPSCINTR nodes
  194. Represent the Discovery's MPSC DMA interrupt hardware registers
  195. (SDMA cause and mask registers).
  196. Required properties:
  197. - reg : Offset and length of the register set for this device
  198. Example Discovery MPSCINTR node:
  199. mpsintr@b800 {
  200. reg = <0xb800 0x100>;
  201. };
  202. i) Marvell Discovery MPSC nodes
  203. Represent the Discovery's MPSC (Multiprotocol Serial Controller)
  204. serial port.
  205. Required properties:
  206. - compatible : "marvell,mv64360-mpsc"
  207. - reg : Offset and length of the register set for this device
  208. - sdma : the phandle for the SDMA node used by this port
  209. - brg : the phandle for the BRG node used by this port
  210. - cunit : the phandle for the CUNIT node used by this port
  211. - mpscrouting : the phandle for the MPSCROUTING node used by this port
  212. - mpscintr : the phandle for the MPSCINTR node used by this port
  213. - cell-index : the hardware index of this cell in the MPSC core
  214. - max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
  215. register
  216. - interrupts : <a> where a is the interrupt number for the MPSC.
  217. - interrupt-parent : the phandle for the interrupt controller
  218. that services interrupts for this device.
  219. Example Discovery MPSCINTR node:
  220. mpsc@8000 {
  221. compatible = "marvell,mv64360-mpsc";
  222. reg = <0x8000 0x38>;
  223. virtual-reg = <0xf1008000>;
  224. sdma = <&SDMA0>;
  225. brg = <&BRG0>;
  226. cunit = <&CUNIT>;
  227. mpscrouting = <&MPSCROUTING>;
  228. mpscintr = <&MPSCINTR>;
  229. cell-index = <0>;
  230. max_idle = <40>;
  231. interrupts = <40>;
  232. interrupt-parent = <&PIC>;
  233. };
  234. j) Marvell Discovery Watch Dog Timer nodes
  235. Represent the Discovery's watchdog timer hardware
  236. Required properties:
  237. - compatible : "marvell,mv64360-wdt"
  238. - reg : Offset and length of the register set for this device
  239. Example Discovery Watch Dog Timer node:
  240. wdt@b410 {
  241. compatible = "marvell,mv64360-wdt";
  242. reg = <0xb410 0x8>;
  243. };
  244. k) Marvell Discovery I2C nodes
  245. Represent the Discovery's I2C hardware
  246. Required properties:
  247. - device_type : "i2c"
  248. - compatible : "marvell,mv64360-i2c"
  249. - reg : Offset and length of the register set for this device
  250. - interrupts : <a> where a is the interrupt number for the I2C.
  251. - interrupt-parent : the phandle for the interrupt controller
  252. that services interrupts for this device.
  253. Example Discovery I2C node:
  254. compatible = "marvell,mv64360-i2c";
  255. reg = <0xc000 0x20>;
  256. virtual-reg = <0xf100c000>;
  257. interrupts = <37>;
  258. interrupt-parent = <&PIC>;
  259. };
  260. l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
  261. Represent the Discovery's PIC hardware
  262. Required properties:
  263. - #interrupt-cells : <1>
  264. - #address-cells : <0>
  265. - compatible : "marvell,mv64360-pic"
  266. - reg : Offset and length of the register set for this device
  267. - interrupt-controller
  268. Example Discovery PIC node:
  269. pic {
  270. #interrupt-cells = <1>;
  271. #address-cells = <0>;
  272. compatible = "marvell,mv64360-pic";
  273. reg = <0x0 0x88>;
  274. interrupt-controller;
  275. };
  276. m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
  277. Represent the Discovery's MPP hardware
  278. Required properties:
  279. - compatible : "marvell,mv64360-mpp"
  280. - reg : Offset and length of the register set for this device
  281. Example Discovery MPP node:
  282. mpp@f000 {
  283. compatible = "marvell,mv64360-mpp";
  284. reg = <0xf000 0x10>;
  285. };
  286. n) Marvell Discovery GPP (General Purpose Pins) nodes
  287. Represent the Discovery's GPP hardware
  288. Required properties:
  289. - compatible : "marvell,mv64360-gpp"
  290. - reg : Offset and length of the register set for this device
  291. Example Discovery GPP node:
  292. gpp@f000 {
  293. compatible = "marvell,mv64360-gpp";
  294. reg = <0xf100 0x20>;
  295. };
  296. o) Marvell Discovery PCI host bridge node
  297. Represents the Discovery's PCI host bridge device. The properties
  298. for this node conform to Rev 2.1 of the PCI Bus Binding to IEEE
  299. 1275-1994. A typical value for the compatible property is
  300. "marvell,mv64360-pci".
  301. Example Discovery PCI host bridge node
  302. pci@80000000 {
  303. #address-cells = <3>;
  304. #size-cells = <2>;
  305. #interrupt-cells = <1>;
  306. device_type = "pci";
  307. compatible = "marvell,mv64360-pci";
  308. reg = <0xcf8 0x8>;
  309. ranges = <0x01000000 0x0 0x0
  310. 0x88000000 0x0 0x01000000
  311. 0x02000000 0x0 0x80000000
  312. 0x80000000 0x0 0x08000000>;
  313. bus-range = <0 255>;
  314. clock-frequency = <66000000>;
  315. interrupt-parent = <&PIC>;
  316. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  317. interrupt-map = <
  318. /* IDSEL 0x0a */
  319. 0x5000 0 0 1 &PIC 80
  320. 0x5000 0 0 2 &PIC 81
  321. 0x5000 0 0 3 &PIC 91
  322. 0x5000 0 0 4 &PIC 93
  323. /* IDSEL 0x0b */
  324. 0x5800 0 0 1 &PIC 91
  325. 0x5800 0 0 2 &PIC 93
  326. 0x5800 0 0 3 &PIC 80
  327. 0x5800 0 0 4 &PIC 81
  328. /* IDSEL 0x0c */
  329. 0x6000 0 0 1 &PIC 91
  330. 0x6000 0 0 2 &PIC 93
  331. 0x6000 0 0 3 &PIC 80
  332. 0x6000 0 0 4 &PIC 81
  333. /* IDSEL 0x0d */
  334. 0x6800 0 0 1 &PIC 93
  335. 0x6800 0 0 2 &PIC 80
  336. 0x6800 0 0 3 &PIC 81
  337. 0x6800 0 0 4 &PIC 91
  338. >;
  339. };
  340. p) Marvell Discovery CPU Error nodes
  341. Represent the Discovery's CPU error handler device.
  342. Required properties:
  343. - compatible : "marvell,mv64360-cpu-error"
  344. - reg : Offset and length of the register set for this device
  345. - interrupts : the interrupt number for this device
  346. - interrupt-parent : the phandle for the interrupt controller
  347. that services interrupts for this device.
  348. Example Discovery CPU Error node:
  349. cpu-error@0070 {
  350. compatible = "marvell,mv64360-cpu-error";
  351. reg = <0x70 0x10 0x128 0x28>;
  352. interrupts = <3>;
  353. interrupt-parent = <&PIC>;
  354. };
  355. q) Marvell Discovery SRAM Controller nodes
  356. Represent the Discovery's SRAM controller device.
  357. Required properties:
  358. - compatible : "marvell,mv64360-sram-ctrl"
  359. - reg : Offset and length of the register set for this device
  360. - interrupts : the interrupt number for this device
  361. - interrupt-parent : the phandle for the interrupt controller
  362. that services interrupts for this device.
  363. Example Discovery SRAM Controller node:
  364. sram-ctrl@0380 {
  365. compatible = "marvell,mv64360-sram-ctrl";
  366. reg = <0x380 0x80>;
  367. interrupts = <13>;
  368. interrupt-parent = <&PIC>;
  369. };
  370. r) Marvell Discovery PCI Error Handler nodes
  371. Represent the Discovery's PCI error handler device.
  372. Required properties:
  373. - compatible : "marvell,mv64360-pci-error"
  374. - reg : Offset and length of the register set for this device
  375. - interrupts : the interrupt number for this device
  376. - interrupt-parent : the phandle for the interrupt controller
  377. that services interrupts for this device.
  378. Example Discovery PCI Error Handler node:
  379. pci-error@1d40 {
  380. compatible = "marvell,mv64360-pci-error";
  381. reg = <0x1d40 0x40 0xc28 0x4>;
  382. interrupts = <12>;
  383. interrupt-parent = <&PIC>;
  384. };
  385. s) Marvell Discovery Memory Controller nodes
  386. Represent the Discovery's memory controller device.
  387. Required properties:
  388. - compatible : "marvell,mv64360-mem-ctrl"
  389. - reg : Offset and length of the register set for this device
  390. - interrupts : the interrupt number for this device
  391. - interrupt-parent : the phandle for the interrupt controller
  392. that services interrupts for this device.
  393. Example Discovery Memory Controller node:
  394. mem-ctrl@1400 {
  395. compatible = "marvell,mv64360-mem-ctrl";
  396. reg = <0x1400 0x60>;
  397. interrupts = <17>;
  398. interrupt-parent = <&PIC>;
  399. };