davinci-nand.txt 2.7 KB

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  1. Device tree bindings for Texas instruments Davinci/Keystone NAND controller
  2. This file provides information, what the device node for the davinci/keystone
  3. NAND interface contains.
  4. Documentation:
  5. Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
  6. Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
  7. Required properties:
  8. - compatible: "ti,davinci-nand"
  9. "ti,keystone-nand"
  10. - reg: Contains 2 offset/length values:
  11. - offset and length for the access window.
  12. - offset and length for accessing the AEMIF
  13. control registers.
  14. - ti,davinci-chipselect: number of chipselect. Indicates on the
  15. davinci_nand driver which chipselect is used
  16. for accessing the nand.
  17. Can be in the range [0-3].
  18. Recommended properties :
  19. - ti,davinci-mask-ale: mask for ALE. Needed for executing address
  20. phase. These offset will be added to the base
  21. address for the chip select space the NAND Flash
  22. device is connected to.
  23. If not set equal to 0x08.
  24. - ti,davinci-mask-cle: mask for CLE. Needed for executing command
  25. phase. These offset will be added to the base
  26. address for the chip select space the NAND Flash
  27. device is connected to.
  28. If not set equal to 0x10.
  29. - ti,davinci-mask-chipsel: mask for chipselect address. Needed to mask
  30. addresses for given chipselect.
  31. - nand-ecc-mode: operation mode of the NAND ecc mode. ECC mode
  32. valid values for davinci driver:
  33. - "none"
  34. - "soft"
  35. - "hw"
  36. - ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
  37. - nand-bus-width: buswidth 8 or 16. If not present 8.
  38. - nand-on-flash-bbt: use flash based bad block table support. OOB
  39. identifier is saved in OOB area. If not present
  40. false.
  41. Deprecated properties:
  42. - ti,davinci-ecc-mode: operation mode of the NAND ecc mode. ECC mode
  43. valid values for davinci driver:
  44. - "none"
  45. - "soft"
  46. - "hw"
  47. - ti,davinci-nand-buswidth: buswidth 8 or 16. If not present 8.
  48. - ti,davinci-nand-use-bbt: use flash based bad block table support. OOB
  49. identifier is saved in OOB area. If not present
  50. false.
  51. Nand device bindings may contain additional sub-nodes describing partitions of
  52. the address space. See partition.txt for more detail. The NAND Flash timing
  53. values must be programmed in the chip select’s node of AEMIF
  54. memory-controller (see Documentation/devicetree/bindings/memory-controllers/
  55. davinci-aemif.txt).
  56. Example(da850 EVM ):
  57. nand_cs3@62000000 {
  58. compatible = "ti,davinci-nand";
  59. reg = <0x62000000 0x807ff
  60. 0x68000000 0x8000>;
  61. ti,davinci-chipselect = <1>;
  62. ti,davinci-mask-ale = <0>;
  63. ti,davinci-mask-cle = <0>;
  64. ti,davinci-mask-chipsel = <0>;
  65. nand-ecc-mode = "hw";
  66. ti,davinci-ecc-bits = <4>;
  67. nand-on-flash-bbt;
  68. partition@180000 {
  69. label = "ubifs";
  70. reg = <0x180000 0x7e80000>;
  71. };
  72. };