CooCenter-System-kernel/Documentation/devicetree/bindings/mtd/mtd-physmap.txt

CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)

Flash chips (Memory Technology Devices) are often used for solid state
file systems on embedded devices.

 - compatible : should contain the specific model of mtd chip(s)
   used, if known, followed by either "cfi-flash", "jedec-flash",
   "mtd-ram" or "mtd-rom".
 - reg : Address range(s) of the mtd chip(s)
   It's possible to (optionally) define multiple "reg" tuples so that
   non-identical chips can be described in one node.
 - bank-width : Width (in bytes) of the bank.  Equal to the
   device width times the number of interleaved chips.
 - device-width : (optional) Width of a single mtd chip.  If
   omitted, assumed to be equal to 'bank-width'.
 - #address-cells, #size-cells : Must be present if the device has
   sub-nodes representing partitions (see below).  In this case
   both #address-cells and #size-cells must be equal to 1.
 - no-unaligned-direct-access: boolean to disable the default direct
   mapping of the flash.
   On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause
   problems with JFFS2 usage, as the local bus (LPB) doesn't support
   unaligned accesses as implemented in the JFFS2 code via memcpy().
   By defining "no-unaligned-direct-access", the flash will not be
   exposed directly to the MTD users (e.g. JFFS2) any more.
 - linux,mtd-name: allow to specify the mtd name for retro capability with
   physmap-flash drivers as boot loader pass the mtd partition via the old
   device name physmap-flash.
 - use-advanced-sector-protection: boolean to enable support for the
   advanced sector protection (Spansion: PPB - Persistent Protection
   Bits) locking.

For JEDEC compatible devices, the following additional properties
are defined:

 - vendor-id : Contains the flash chip's vendor id (1 byte).
 - device-id : Contains the flash chip's device id (1 byte).

For ROM compatible devices (and ROM fallback from cfi-flash), the following
additional (optional) property is defined:

 - erase-size : The chip's physical erase block size in bytes.

The device tree may optionally contain sub-nodes describing partitions of the
address space. See partition.txt for more detail.

Example:

	flash@ff000000 {
		compatible = "amd,am29lv128ml", "cfi-flash";
		reg = <ff000000 01000000>;
		bank-width = <4>;
		device-width = <1>;
		#address-cells = <1>;
		#size-cells = <1>;
		fs@0 {
			label = "fs";
			reg = <0 f80000>;
		};
		firmware@f80000 {
			label ="firmware";
			reg = <f80000 80000>;
			read-only;
		};
	};

Here an example with multiple "reg" tuples:

	flash@f0000000,0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "intel,PC48F4400P0VB", "cfi-flash";
		reg = <0 0x00000000 0x02000000
		       0 0x02000000 0x02000000>;
		bank-width = <2>;
		partition@0 {
			label = "test-part1";
			reg = <0 0x04000000>;
		};
	};

An example using SRAM:

	sram@2,0 {
		compatible = "samsung,k6f1616u6a", "mtd-ram";
		reg = <2 0 0x00200000>;
		bank-width = <2>;
	};