hisilicon-hip04-net.txt 2.1 KB

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  1. Hisilicon hip04 Ethernet Controller
  2. * Ethernet controller node
  3. Required properties:
  4. - compatible: should be "hisilicon,hip04-mac".
  5. - reg: address and length of the register set for the device.
  6. - interrupts: interrupt for the device.
  7. - port-handle: <phandle port channel>
  8. phandle, specifies a reference to the syscon ppe node
  9. port, port number connected to the controller
  10. channel, recv channel start from channel * number (RX_DESC_NUM)
  11. - phy-mode: see ethernet.txt [1].
  12. Optional properties:
  13. - phy-handle: see ethernet.txt [1].
  14. [1] Documentation/devicetree/bindings/net/ethernet.txt
  15. * Ethernet ppe node:
  16. Control rx & tx fifos of all ethernet controllers.
  17. Have 2048 recv channels shared by all ethernet controllers, only if no overlap.
  18. Each controller's recv channel start from channel * number (RX_DESC_NUM).
  19. Required properties:
  20. - compatible: "hisilicon,hip04-ppe", "syscon".
  21. - reg: address and length of the register set for the device.
  22. * MDIO bus node:
  23. Required properties:
  24. - compatible: should be "hisilicon,mdio".
  25. - Inherits from MDIO bus node binding [2]
  26. [2] Documentation/devicetree/bindings/net/phy.txt
  27. Example:
  28. mdio {
  29. compatible = "hisilicon,mdio";
  30. reg = <0x28f1000 0x1000>;
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. phy0: ethernet-phy@0 {
  34. compatible = "ethernet-phy-ieee802.3-c22";
  35. reg = <0>;
  36. marvell,reg-init = <18 0x14 0 0x8001>;
  37. };
  38. phy1: ethernet-phy@1 {
  39. compatible = "ethernet-phy-ieee802.3-c22";
  40. reg = <1>;
  41. marvell,reg-init = <18 0x14 0 0x8001>;
  42. };
  43. };
  44. ppe: ppe@28c0000 {
  45. compatible = "hisilicon,hip04-ppe", "syscon";
  46. reg = <0x28c0000 0x10000>;
  47. };
  48. fe: ethernet@28b0000 {
  49. compatible = "hisilicon,hip04-mac";
  50. reg = <0x28b0000 0x10000>;
  51. interrupts = <0 413 4>;
  52. phy-mode = "mii";
  53. port-handle = <&ppe 31 0>;
  54. };
  55. ge0: ethernet@2800000 {
  56. compatible = "hisilicon,hip04-mac";
  57. reg = <0x2800000 0x10000>;
  58. interrupts = <0 402 4>;
  59. phy-mode = "sgmii";
  60. port-handle = <&ppe 0 1>;
  61. phy-handle = <&phy0>;
  62. };
  63. ge8: ethernet@2880000 {
  64. compatible = "hisilicon,hip04-mac";
  65. reg = <0x2880000 0x10000>;
  66. interrupts = <0 410 4>;
  67. phy-mode = "sgmii";
  68. port-handle = <&ppe 8 2>;
  69. phy-handle = <&phy1>;
  70. };