qca-qca7000-spi.txt 1.8 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647
  1. * Qualcomm QCA7000 (Ethernet over SPI protocol)
  2. Note: The QCA7000 is useable as a SPI device. In this case it must be defined
  3. as a child of a SPI master in the device tree.
  4. Required properties:
  5. - compatible : Should be "qca,qca7000"
  6. - reg : Should specify the SPI chip select
  7. - interrupts : The first cell should specify the index of the source interrupt
  8. and the second cell should specify the trigger type as rising edge
  9. - spi-cpha : Must be set
  10. - spi-cpol: Must be set
  11. Optional properties:
  12. - interrupt-parent : Specify the pHandle of the source interrupt
  13. - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at.
  14. Numbers smaller than 1000000 or greater than 16000000 are invalid. Missing
  15. the property will set the SPI frequency to 8000000 Hertz.
  16. - local-mac-address: 6 bytes, MAC address
  17. - qca,legacy-mode : Set the SPI data transfer of the QCA7000 to legacy mode.
  18. In this mode the SPI master must toggle the chip select between each data
  19. word. In burst mode these gaps aren't necessary, which is faster.
  20. This setting depends on how the QCA7000 is setup via GPIO pin strapping.
  21. If the property is missing the driver defaults to burst mode.
  22. Example:
  23. /* Freescale i.MX28 SPI master*/
  24. ssp2: spi@80014000 {
  25. #address-cells = <1>;
  26. #size-cells = <0>;
  27. compatible = "fsl,imx28-spi";
  28. pinctrl-names = "default";
  29. pinctrl-0 = <&spi2_pins_a>;
  30. status = "okay";
  31. qca7000: ethernet@0 {
  32. compatible = "qca,qca7000";
  33. reg = <0x0>;
  34. interrupt-parent = <&gpio3>; /* GPIO Bank 3 */
  35. interrupts = <25 0x1>; /* Index: 25, rising edge */
  36. spi-cpha; /* SPI mode: CPHA=1 */
  37. spi-cpol; /* SPI mode: CPOL=1 */
  38. spi-max-frequency = <8000000>; /* freq: 8 MHz */
  39. local-mac-address = [ A0 B0 C0 D0 E0 F0 ];
  40. };
  41. };