qcom,apq8064-pinctrl.txt 2.9 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788
  1. Qualcomm APQ8064 TLMM block
  2. Required properties:
  3. - compatible: "qcom,apq8064-pinctrl"
  4. - reg: Should be the base address and length of the TLMM block.
  5. - interrupts: Should be the parent IRQ of the TLMM block.
  6. - interrupt-controller: Marks the device node as an interrupt controller.
  7. - #interrupt-cells: Should be two.
  8. - gpio-controller: Marks the device node as a GPIO controller.
  9. - #gpio-cells : Should be two.
  10. The first cell is the gpio pin number and the
  11. second cell is used for optional parameters.
  12. Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
  13. a general description of GPIO and interrupt bindings.
  14. Please refer to pinctrl-bindings.txt in this directory for details of the
  15. common pinctrl bindings used by client devices, including the meaning of the
  16. phrase "pin configuration node".
  17. Qualcomm's pin configuration nodes act as a container for an arbitrary number of
  18. subnodes. Each of these subnodes represents some desired configuration for a
  19. pin, a group, or a list of pins or groups. This configuration can include the
  20. mux function to select on those pin(s)/group(s), and various pin configuration
  21. parameters, such as pull-up, drive strength, etc.
  22. The name of each subnode is not important; all subnodes should be enumerated
  23. and processed purely based on their content.
  24. Each subnode only affects those parameters that are explicitly listed. In
  25. other words, a subnode that lists a mux function but no pin configuration
  26. parameters implies no information about any pin configuration parameters.
  27. Similarly, a pin subnode that describes a pullup parameter implies no
  28. information about e.g. the mux function.
  29. The following generic properties as defined in pinctrl-bindings.txt are valid
  30. to specify in a pin configuration subnode:
  31. pins, function, bias-disable, bias-pull-down, bias-pull,up, drive-strength,
  32. output-low, output-high.
  33. Non-empty subnodes must specify the 'pins' property.
  34. Valid values for pins are:
  35. gpio0-gpio89
  36. Valid values for function are:
  37. cam_mclk, codec_mic_i2s, codec_spkr_i2s, gpio, gsbi1, gsbi2, gsbi3, gsbi4,
  38. gsbi4_cam_i2c, gsbi5, gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3, gsbi6,
  39. gsbi6_spi_cs1, gsbi6_spi_cs2, gsbi6_spi_cs3, gsbi7, gsbi7_spi_cs1,
  40. gsbi7_spi_cs2, gsbi7_spi_cs3, gsbi_cam_i2c, hdmi, mi2s, riva_bt, riva_fm,
  41. riva_wlan, sdc2, sdc4, slimbus, spkr_i2s, tsif1, tsif2, usb2_hsic, ps_hold
  42. Example:
  43. msmgpio: pinctrl@800000 {
  44. compatible = "qcom,apq8064-pinctrl";
  45. reg = <0x800000 0x4000>;
  46. gpio-controller;
  47. #gpio-cells = <2>;
  48. interrupt-controller;
  49. #interrupt-cells = <2>;
  50. interrupts = <0 16 0x4>;
  51. pinctrl-names = "default";
  52. pinctrl-0 = <&gsbi5_uart_default>;
  53. gsbi5_uart_default: gsbi5_uart_default {
  54. mux {
  55. pins = "gpio51", "gpio52";
  56. function = "gsbi5";
  57. };
  58. tx {
  59. pins = "gpio51";
  60. drive-strength = <4>;
  61. bias-disable;
  62. };
  63. rx {
  64. pins = "gpio52";
  65. drive-strength = <2>;
  66. bias-pull-up;
  67. };
  68. };
  69. };