renesas,pfc-pinctrl.txt 6.0 KB

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  1. * Renesas Pin Function Controller (GPIO and Pin Mux/Config)
  2. The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
  3. R8A73A4 and R8A7740 it also acts as a GPIO controller.
  4. Pin Control
  5. -----------
  6. Required Properties:
  7. - compatible: should be one of the following.
  8. - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
  9. - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
  10. - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
  11. - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
  12. - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
  13. - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
  14. - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
  15. - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
  16. - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
  17. - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
  18. - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
  19. - reg: Base address and length of each memory resource used by the pin
  20. controller hardware module.
  21. Optional properties:
  22. - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
  23. otherwise. Should be 3.
  24. - interrupts-extended: Specify the interrupts associated with external
  25. IRQ pins. This property is mandatory when the PFC handles GPIOs and
  26. forbidden otherwise. When specified, it must contain one interrupt per
  27. external IRQ, sorted by external IRQ number.
  28. The PFC node also acts as a container for pin configuration nodes. Please refer
  29. to pinctrl-bindings.txt in this directory for the definition of the term "pin
  30. configuration node" and for the common pinctrl bindings used by client devices.
  31. Each pin configuration node represents a desired configuration for a pin, a
  32. pin group, or a list of pins or pin groups. The configuration can include the
  33. function to select on those pin(s) and pin configuration parameters (such as
  34. pull-up and pull-down).
  35. Pin configuration nodes contain pin configuration properties, either directly
  36. or grouped in child subnodes. Both pin muxing and configuration parameters can
  37. be grouped in that way and referenced as a single pin configuration node by
  38. client devices.
  39. A configuration node or subnode must reference at least one pin (through the
  40. pins or pin groups properties) and contain at least a function or one
  41. configuration parameter. When the function is present only pin groups can be
  42. used to reference pins.
  43. All pin configuration nodes and subnodes names are ignored. All of those nodes
  44. are parsed through phandles and processed purely based on their content.
  45. Pin Configuration Node Properties:
  46. - pins : An array of strings, each string containing the name of a pin.
  47. - groups : An array of strings, each string containing the name of a pin
  48. group.
  49. - function: A string containing the name of the function to mux to the pin
  50. group(s) specified by the groups property.
  51. Valid values for pin, group and function names can be found in the group and
  52. function arrays of the PFC data file corresponding to the SoC
  53. (drivers/pinctrl/sh-pfc/pfc-*.c)
  54. The pin configuration parameters use the generic pinconf bindings defined in
  55. pinctrl-bindings.txt in this directory. The supported parameters are
  56. bias-disable, bias-pull-up, bias-pull-down and power-source. For pins that
  57. have a configurable I/O voltage, the power-source value should be the
  58. nominal I/O voltage in millivolts.
  59. GPIO
  60. ----
  61. On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
  62. Required Properties:
  63. - gpio-controller: Marks the device node as a gpio controller.
  64. - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
  65. cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
  66. GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
  67. The syntax of the gpio specifier used by client nodes should be the following
  68. with values derived from the SoC user manual.
  69. <[phandle of the gpio controller node]
  70. [pin number within the gpio controller]
  71. [flags]>
  72. On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
  73. Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
  74. for documentation of the GPIO device tree bindings on those platforms.
  75. Examples
  76. --------
  77. Example 1: SH73A0 (SH-Mobile AG5) pin controller node
  78. pfc: pfc@e6050000 {
  79. compatible = "renesas,pfc-sh73a0";
  80. reg = <0xe6050000 0x8000>,
  81. <0xe605801c 0x1c>;
  82. gpio-controller;
  83. #gpio-cells = <2>;
  84. interrupts-extended =
  85. <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
  86. <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
  87. <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
  88. <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
  89. <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
  90. <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
  91. <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
  92. <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
  93. };
  94. Example 2: A GPIO LED node that references a GPIO
  95. #include <dt-bindings/gpio/gpio.h>
  96. leds {
  97. compatible = "gpio-leds";
  98. led1 {
  99. gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
  100. };
  101. };
  102. Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
  103. for the MMCIF and SCIFA4 devices
  104. &pfc {
  105. pinctrl-0 = <&scifa4_pins>;
  106. pinctrl-names = "default";
  107. mmcif_pins: mmcif {
  108. mux {
  109. groups = "mmc0_data8_0", "mmc0_ctrl_0";
  110. function = "mmc0";
  111. };
  112. cfg {
  113. groups = "mmc0_data8_0";
  114. pins = "PORT279";
  115. bias-pull-up;
  116. };
  117. };
  118. scifa4_pins: scifa4 {
  119. groups = "scifa4_data", "scifa4_ctrl";
  120. function = "scifa4";
  121. };
  122. };
  123. Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
  124. &mmcif {
  125. pinctrl-0 = <&mmcif_pins>;
  126. pinctrl-names = "default";
  127. bus-width = <8>;
  128. vmmc-supply = <&reg_1p8v>;
  129. status = "okay";
  130. };