samsung-pinctrl.txt 13 KB

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  1. Samsung GPIO and Pin Mux/Config controller
  2. Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
  3. controller. It controls the input/output settings on the available pads/pins
  4. and also provides ability to multiplex and configure the output of various
  5. on-chip controllers onto these pads.
  6. Required Properties:
  7. - compatible: should be one of the following.
  8. - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
  9. - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
  10. - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
  11. - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
  12. - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
  13. - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
  14. - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
  15. - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
  16. - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
  17. - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
  18. - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
  19. - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
  20. - reg: Base address of the pin controller hardware module and length of
  21. the address space it occupies.
  22. - Pin banks as child nodes: Pin banks of the controller are represented by child
  23. nodes of the controller node. Bank name is taken from name of the node. Each
  24. bank node must contain following properties:
  25. - gpio-controller: identifies the node as a gpio controller and pin bank.
  26. - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
  27. binding is used, the amount of cells must be specified as 2. See the below
  28. mentioned gpio binding representation for description of particular cells.
  29. Eg: <&gpx2 6 0>
  30. <[phandle of the gpio controller node]
  31. [pin number within the gpio controller]
  32. [flags]>
  33. Values for gpio specifier:
  34. - Pin number: is a value between 0 to 7.
  35. - Flags: 0 - Active High
  36. 1 - Active Low
  37. - Pin mux/config groups as child nodes: The pin mux (selecting pin function
  38. mode) and pin config (pull up/down, driver strength) settings are represented
  39. as child nodes of the pin-controller node. There should be atleast one
  40. child node and there is no limit on the count of these child nodes. It is
  41. also possible for a child node to consist of several further child nodes
  42. to allow grouping multiple pinctrl groups into one. The format of second
  43. level child nodes is exactly the same as for first level ones and is
  44. described below.
  45. The child node should contain a list of pin(s) on which a particular pin
  46. function selection or pin configuration (or both) have to applied. This
  47. list of pins is specified using the property name "samsung,pins". There
  48. should be atleast one pin specfied for this property and there is no upper
  49. limit on the count of pins that can be specified. The pins are specified
  50. using pin names which are derived from the hardware manual of the SoC. As
  51. an example, the pins in GPA0 bank of the pin controller can be represented
  52. as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
  53. The format of the pin names should be (as per the hardware manual)
  54. "[pin bank name]-[pin number within the bank]".
  55. The pin function selection that should be applied on the pins listed in the
  56. child node is specified using the "samsung,pin-function" property. The value
  57. of this property that should be applied to each of the pins listed in the
  58. "samsung,pins" property should be picked from the hardware manual of the SoC
  59. for the specified pin group. This property is optional in the child node if
  60. no specific function selection is desired for the pins listed in the child
  61. node. The value of this property is used as-is to program the pin-controller
  62. function selector register of the pin-bank.
  63. The child node can also optionally specify one or more of the pin
  64. configuration that should be applied on all the pins listed in the
  65. "samsung,pins" property of the child node. The following pin configuration
  66. properties are supported.
  67. - samsung,pin-val: Initial value of pin output buffer.
  68. - samsung,pin-pud: Pull up/down configuration.
  69. - samsung,pin-drv: Drive strength configuration.
  70. - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
  71. - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
  72. The values specified by these config properties should be derived from the
  73. hardware manual and these values are programmed as-is into the pin
  74. pull up/down and driver strength register of the pin-controller.
  75. Note: A child should include atleast a pin function selection property or
  76. pin configuration property (one or more) or both.
  77. The client nodes that require a particular pin function selection and/or
  78. pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
  79. file.
  80. External GPIO and Wakeup Interrupts:
  81. The controller supports two types of external interrupts over gpio. The first
  82. is the external gpio interrupt and second is the external wakeup interrupts.
  83. The difference between the two is that the external wakeup interrupts can be
  84. used as system wakeup events.
  85. A. External GPIO Interrupts: For supporting external gpio interrupts, the
  86. following properties should be specified in the pin-controller device node.
  87. - interrupt-parent: phandle of the interrupt parent to which the external
  88. GPIO interrupts are forwarded to.
  89. - interrupts: interrupt specifier for the controller. The format and value of
  90. the interrupt specifier depends on the interrupt parent for the controller.
  91. In addition, following properties must be present in node of every bank
  92. of pins supporting GPIO interrupts:
  93. - interrupt-controller: identifies the controller node as interrupt-parent.
  94. - #interrupt-cells: the value of this property should be 2.
  95. - First Cell: represents the external gpio interrupt number local to the
  96. external gpio interrupt space of the controller.
  97. - Second Cell: flags to identify the type of the interrupt
  98. - 1 = rising edge triggered
  99. - 2 = falling edge triggered
  100. - 3 = rising and falling edge triggered
  101. - 4 = high level triggered
  102. - 8 = low level triggered
  103. B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
  104. child node representing the external wakeup interrupt controller should be
  105. included in the pin-controller device node. This child node should include
  106. the following properties.
  107. - compatible: identifies the type of the external wakeup interrupt controller
  108. The possible values are:
  109. - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller
  110. found on Samsung S3C24xx SoCs except S3C2412 and S3C2413,
  111. - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller
  112. found on Samsung S3C2412 and S3C2413 SoCs,
  113. - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
  114. found on Samsung S3C64xx SoCs,
  115. - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
  116. found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
  117. - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
  118. found on Samsung Exynos7 SoC.
  119. - interrupt-parent: phandle of the interrupt parent to which the external
  120. wakeup interrupts are forwarded to.
  121. - interrupts: interrupt used by multiplexed wakeup interrupts.
  122. In addition, following properties must be present in node of every bank
  123. of pins supporting wake-up interrupts:
  124. - interrupt-controller: identifies the node as interrupt-parent.
  125. - #interrupt-cells: the value of this property should be 2
  126. - First Cell: represents the external wakeup interrupt number local to
  127. the external wakeup interrupt space of the controller.
  128. - Second Cell: flags to identify the type of the interrupt
  129. - 1 = rising edge triggered
  130. - 2 = falling edge triggered
  131. - 3 = rising and falling edge triggered
  132. - 4 = high level triggered
  133. - 8 = low level triggered
  134. Node of every bank of pins supporting direct wake-up interrupts (without
  135. multiplexing) must contain following properties:
  136. - interrupt-parent: phandle of the interrupt parent to which the external
  137. wakeup interrupts are forwarded to.
  138. - interrupts: interrupts of the interrupt parent which are used for external
  139. wakeup interrupts from pins of the bank, must contain interrupts for all
  140. pins of the bank.
  141. Aliases:
  142. All the pin controller nodes should be represented in the aliases node using
  143. the following format 'pinctrl{n}' where n is a unique number for the alias.
  144. Aliases for controllers compatible with "samsung,exynos7-pinctrl":
  145. - pinctrl0: pin controller of ALIVE block,
  146. - pinctrl1: pin controller of BUS0 block,
  147. - pinctrl2: pin controller of NFC block,
  148. - pinctrl3: pin controller of TOUCH block,
  149. - pinctrl4: pin controller of FF block,
  150. - pinctrl5: pin controller of ESE block,
  151. - pinctrl6: pin controller of FSYS0 block,
  152. - pinctrl7: pin controller of FSYS1 block,
  153. - pinctrl8: pin controller of BUS1 block,
  154. - pinctrl9: pin controller of AUDIO block,
  155. Example: A pin-controller node with pin banks:
  156. pinctrl_0: pinctrl@11400000 {
  157. compatible = "samsung,exynos4210-pinctrl";
  158. reg = <0x11400000 0x1000>;
  159. interrupts = <0 47 0>;
  160. /* ... */
  161. /* Pin bank without external interrupts */
  162. gpy0: gpy0 {
  163. gpio-controller;
  164. #gpio-cells = <2>;
  165. };
  166. /* ... */
  167. /* Pin bank with external GPIO or muxed wake-up interrupts */
  168. gpj0: gpj0 {
  169. gpio-controller;
  170. #gpio-cells = <2>;
  171. interrupt-controller;
  172. #interrupt-cells = <2>;
  173. };
  174. /* ... */
  175. /* Pin bank with external direct wake-up interrupts */
  176. gpx0: gpx0 {
  177. gpio-controller;
  178. #gpio-cells = <2>;
  179. interrupt-controller;
  180. interrupt-parent = <&gic>;
  181. interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  182. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
  183. #interrupt-cells = <2>;
  184. };
  185. /* ... */
  186. };
  187. Example 1: A pin-controller node with pin groups.
  188. pinctrl_0: pinctrl@11400000 {
  189. compatible = "samsung,exynos4210-pinctrl";
  190. reg = <0x11400000 0x1000>;
  191. interrupts = <0 47 0>;
  192. /* ... */
  193. uart0_data: uart0-data {
  194. samsung,pins = "gpa0-0", "gpa0-1";
  195. samsung,pin-function = <2>;
  196. samsung,pin-pud = <0>;
  197. samsung,pin-drv = <0>;
  198. };
  199. uart0_fctl: uart0-fctl {
  200. samsung,pins = "gpa0-2", "gpa0-3";
  201. samsung,pin-function = <2>;
  202. samsung,pin-pud = <0>;
  203. samsung,pin-drv = <0>;
  204. };
  205. uart1_data: uart1-data {
  206. samsung,pins = "gpa0-4", "gpa0-5";
  207. samsung,pin-function = <2>;
  208. samsung,pin-pud = <0>;
  209. samsung,pin-drv = <0>;
  210. };
  211. uart1_fctl: uart1-fctl {
  212. samsung,pins = "gpa0-6", "gpa0-7";
  213. samsung,pin-function = <2>;
  214. samsung,pin-pud = <0>;
  215. samsung,pin-drv = <0>;
  216. };
  217. i2c2_bus: i2c2-bus {
  218. samsung,pins = "gpa0-6", "gpa0-7";
  219. samsung,pin-function = <3>;
  220. samsung,pin-pud = <3>;
  221. samsung,pin-drv = <0>;
  222. };
  223. sd4_bus8: sd4-bus-width8 {
  224. part-1 {
  225. samsung,pins = "gpk0-3", "gpk0-4",
  226. "gpk0-5", "gpk0-6";
  227. samsung,pin-function = <3>;
  228. samsung,pin-pud = <3>;
  229. samsung,pin-drv = <3>;
  230. };
  231. part-2 {
  232. samsung,pins = "gpk1-3", "gpk1-4",
  233. "gpk1-5", "gpk1-6";
  234. samsung,pin-function = <4>;
  235. samsung,pin-pud = <4>;
  236. samsung,pin-drv = <3>;
  237. };
  238. };
  239. };
  240. Example 2: A pin-controller node with external wakeup interrupt controller node.
  241. pinctrl_1: pinctrl@11000000 {
  242. compatible = "samsung,exynos4210-pinctrl";
  243. reg = <0x11000000 0x1000>;
  244. interrupts = <0 46 0>
  245. /* ... */
  246. wakeup-interrupt-controller {
  247. compatible = "samsung,exynos4210-wakeup-eint";
  248. interrupt-parent = <&gic>;
  249. interrupts = <0 32 0>;
  250. };
  251. };
  252. Example 3: A uart client node that supports 'default' and 'flow-control' states.
  253. uart@13800000 {
  254. compatible = "samsung,exynos4210-uart";
  255. reg = <0x13800000 0x100>;
  256. interrupts = <0 52 0>;
  257. pinctrl-names = "default", "flow-control;
  258. pinctrl-0 = <&uart0_data>;
  259. pinctrl-1 = <&uart0_data &uart0_fctl>;
  260. };
  261. Example 4: Set up the default pin state for uart controller.
  262. static int s3c24xx_serial_probe(struct platform_device *pdev) {
  263. struct pinctrl *pinctrl;
  264. /* ... */
  265. pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
  266. }
  267. Example 5: A display port client node that supports 'default' pinctrl state
  268. and gpio binding.
  269. display-port-controller {
  270. /* ... */
  271. samsung,hpd-gpio = <&gpx2 6 0>;
  272. pinctrl-names = "default";
  273. pinctrl-0 = <&dp_hpd>;
  274. };
  275. Example 6: Request the gpio for display port controller
  276. static int exynos_dp_probe(struct platform_device *pdev)
  277. {
  278. int hpd_gpio, ret;
  279. struct device *dev = &pdev->dev;
  280. struct device_node *dp_node = dev->of_node;
  281. /* ... */
  282. hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0);
  283. /* ... */
  284. ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN,
  285. "hpd_gpio");
  286. /* ... */
  287. }