mrvl,pxa-ssp.txt 1.2 KB

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  1. Device tree bindings for Marvell PXA SSP ports
  2. Required properties:
  3. - compatible: Must be one of
  4. mrvl,pxa25x-ssp
  5. mvrl,pxa25x-nssp
  6. mrvl,pxa27x-ssp
  7. mrvl,pxa3xx-ssp
  8. mvrl,pxa168-ssp
  9. mrvl,pxa910-ssp
  10. mrvl,ce4100-ssp
  11. - reg: The memory base
  12. - dmas: Two dma phandles, one for rx, one for tx
  13. - dma-names: Must be "rx", "tx"
  14. Example for PXA3xx:
  15. ssp0: ssp@41000000 {
  16. compatible = "mrvl,pxa3xx-ssp";
  17. reg = <0x41000000 0x40>;
  18. ssp-id = <1>;
  19. interrupts = <24>;
  20. clock-names = "pxa27x-ssp.0";
  21. dmas = <&dma 13
  22. &dma 14>;
  23. dma-names = "rx", "tx";
  24. };
  25. ssp1: ssp@41700000 {
  26. compatible = "mrvl,pxa3xx-ssp";
  27. reg = <0x41700000 0x40>;
  28. ssp-id = <2>;
  29. interrupts = <16>;
  30. clock-names = "pxa27x-ssp.1";
  31. dmas = <&dma 15
  32. &dma 16>;
  33. dma-names = "rx", "tx";
  34. };
  35. ssp2: ssp@41900000 {
  36. compatibl3 = "mrvl,pxa3xx-ssp";
  37. reg = <0x41900000 0x40>;
  38. ssp-id = <3>;
  39. interrupts = <0>;
  40. clock-names = "pxa27x-ssp.2";
  41. dmas = <&dma 66
  42. &dma 67>;
  43. dma-names = "rx", "tx";
  44. };
  45. ssp3: ssp@41a00000 {
  46. compatible = "mrvl,pxa3xx-ssp";
  47. reg = <0x41a00000 0x40>;
  48. ssp-id = <4>;
  49. interrupts = <13>;
  50. clock-names = "pxa27x-ssp.3";
  51. dmas = <&dma 2
  52. &dma 3>;
  53. dma-names = "rx", "tx";
  54. };