sirf-uart.txt 1.0 KB

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  1. * CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter *
  2. Required properties:
  3. - compatible : Should be "sirf,prima2-uart", "sirf, prima2-usp-uart",
  4. "sirf,atlas7-uart" or "sirf,atlas7-usp-uart".
  5. - reg : Offset and length of the register set for the device
  6. - interrupts : Should contain uart interrupt
  7. - fifosize : Should define hardware rx/tx fifo size
  8. - clocks : Should contain uart clock number
  9. Optional properties:
  10. - sirf,uart-has-rtscts: we have hardware flow controller pins in hardware
  11. - rts-gpios: RTS pin for USP-based UART if sirf,uart-has-rtscts is true
  12. - cts-gpios: CTS pin for USP-based UART if sirf,uart-has-rtscts is true
  13. Example:
  14. uart0: uart@b0050000 {
  15. cell-index = <0>;
  16. compatible = "sirf,prima2-uart";
  17. reg = <0xb0050000 0x1000>;
  18. interrupts = <17>;
  19. fifosize = <128>;
  20. clocks = <&clks 13>;
  21. };
  22. On the board-specific dts, we can put rts-gpios and cts-gpios like
  23. usp@b0090000 {
  24. compatible = "sirf,prima2-usp-uart";
  25. sirf,uart-has-rtscts;
  26. rts-gpios = <&gpio 15 0>;
  27. cts-gpios = <&gpio 46 0>;
  28. };