nvidia,tegra20-slink.txt 1.1 KB

1234567891011121314151617181920212223242526272829303132333435363738
  1. NVIDIA Tegra20/Tegra30 SLINK controller.
  2. Required properties:
  3. - compatible : should be "nvidia,tegra20-slink", "nvidia,tegra30-slink".
  4. - reg: Should contain SLINK registers location and length.
  5. - interrupts: Should contain SLINK interrupts.
  6. - clocks : Must contain one entry, for the module clock.
  7. See ../clocks/clock-bindings.txt for details.
  8. - resets : Must contain an entry for each entry in reset-names.
  9. See ../reset/reset.txt for details.
  10. - reset-names : Must include the following entries:
  11. - spi
  12. - dmas : Must contain an entry for each entry in clock-names.
  13. See ../dma/dma.txt for details.
  14. - dma-names : Must include the following entries:
  15. - rx
  16. - tx
  17. Recommended properties:
  18. - spi-max-frequency: Definition as per
  19. Documentation/devicetree/bindings/spi/spi-bus.txt
  20. Example:
  21. spi@7000d600 {
  22. compatible = "nvidia,tegra20-slink";
  23. reg = <0x7000d600 0x200>;
  24. interrupts = <0 82 0x04>;
  25. spi-max-frequency = <25000000>;
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. clocks = <&tegra_car 44>;
  29. resets = <&tegra_car 44>;
  30. reset-names = "spi";
  31. dmas = <&apbdma 16>, <&apbdma 16>;
  32. dma-names = "rx", "tx";
  33. status = "disabled";
  34. };