spi-mt65xx.txt 2.0 KB

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  1. Binding for MTK SPI controller
  2. Required properties:
  3. - compatible: should be one of the following.
  4. - mediatek,mt8173-spi: for mt8173 platforms
  5. - mediatek,mt8135-spi: for mt8135 platforms
  6. - mediatek,mt6589-spi: for mt6589 platforms
  7. - #address-cells: should be 1.
  8. - #size-cells: should be 0.
  9. - reg: Address and length of the register set for the device
  10. - interrupts: Should contain spi interrupt
  11. - clocks: phandles to input clocks.
  12. The first should be one of the following. It's PLL.
  13. - <&clk26m>: specify parent clock 26MHZ.
  14. - <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
  15. It's the default one.
  16. - <&topckgen CLK_TOP_SYSPLL4_D2>: specify parent clock 78MHZ.
  17. - <&topckgen CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
  18. - <&topckgen CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
  19. The second should be <&topckgen CLK_TOP_SPI_SEL>. It's clock mux.
  20. The third is <&pericfg CLK_PERI_SPI0>. It's clock gate.
  21. - clock-names: shall be "parent-clk" for the parent clock, "sel-clk" for the
  22. muxes clock, and "spi-clk" for the clock gate.
  23. Optional properties:
  24. -cs-gpios: see spi-bus.txt, only required for MT8173.
  25. - mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
  26. controller used. This is a array, the element value should be 0~3,
  27. only required for MT8173.
  28. 0: specify GPIO69,70,71,72 for spi pins.
  29. 1: specify GPIO102,103,104,105 for spi pins.
  30. 2: specify GPIO128,129,130,131 for spi pins.
  31. 3: specify GPIO5,6,7,8 for spi pins.
  32. Example:
  33. - SoC Specific Portion:
  34. spi: spi@1100a000 {
  35. compatible = "mediatek,mt8173-spi";
  36. #address-cells = <1>;
  37. #size-cells = <0>;
  38. reg = <0 0x1100a000 0 0x1000>;
  39. interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
  40. clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
  41. <&topckgen CLK_TOP_SPI_SEL>,
  42. <&pericfg CLK_PERI_SPI0>;
  43. clock-names = "parent-clk", "sel-clk", "spi-clk";
  44. cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>;
  45. mediatek,pad-select = <1>, <0>;
  46. status = "disabled";
  47. };