spi-octeon.txt 763 B

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  1. Cavium, Inc. OCTEON SOC SPI master controller.
  2. Required properties:
  3. - compatible : "cavium,octeon-3010-spi"
  4. - reg : The register base for the controller.
  5. - interrupts : One interrupt, used by the controller.
  6. - #address-cells : <1>, as required by generic SPI binding.
  7. - #size-cells : <0>, also as required by generic SPI binding.
  8. Child nodes as per the generic SPI binding.
  9. Example:
  10. spi@1070000001000 {
  11. compatible = "cavium,octeon-3010-spi";
  12. reg = <0x10700 0x00001000 0x0 0x100>;
  13. interrupts = <0 58>;
  14. #address-cells = <1>;
  15. #size-cells = <0>;
  16. eeprom@0 {
  17. compatible = "st,m95256", "atmel,at25";
  18. reg = <0>;
  19. spi-max-frequency = <5000000>;
  20. spi-cpha;
  21. spi-cpol;
  22. pagesize = <64>;
  23. size = <32768>;
  24. address-width = <16>;
  25. };
  26. };