allwinner,sun5i-a13-hstimer.txt 690 B

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  1. Allwinner SoCs High Speed Timer Controller
  2. Required properties:
  3. - compatible : should be "allwinner,sun5i-a13-hstimer" or
  4. "allwinner,sun7i-a20-hstimer"
  5. - reg : Specifies base physical address and size of the registers.
  6. - interrupts : The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i
  7. one)
  8. - clocks: phandle to the source clock (usually the AHB clock)
  9. Optionnal properties:
  10. - resets: phandle to a reset controller asserting the timer
  11. Example:
  12. timer@01c60000 {
  13. compatible = "allwinner,sun7i-a20-hstimer";
  14. reg = <0x01c60000 0x1000>;
  15. interrupts = <0 51 1>,
  16. <0 52 1>,
  17. <0 53 1>,
  18. <0 54 1>;
  19. clocks = <&ahb1_gates 19>;
  20. resets = <&ahb1rst 19>;
  21. };