ci-hdrc-usb2.txt 3.4 KB

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  1. * USB2 ChipIdea USB controller for ci13xxx
  2. Required properties:
  3. - compatible: should be one of:
  4. "fsl,imx27-usb"
  5. "lsi,zevio-usb"
  6. "qcom,ci-hdrc"
  7. "chipidea,usb2"
  8. "xlnx,zynq-usb-2.20a"
  9. - reg: base address and length of the registers
  10. - interrupts: interrupt for the USB controller
  11. Recommended properies:
  12. - phy_type: the type of the phy connected to the core. Should be one
  13. of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
  14. property the PORTSC register won't be touched.
  15. - dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
  16. Deprecated properties:
  17. - usb-phy: phandle for the PHY device. Use "phys" instead.
  18. - fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.
  19. Optional properties:
  20. - clocks: reference to the USB clock
  21. - phys: reference to the USB PHY
  22. - phy-names: should be "usb-phy"
  23. - vbus-supply: reference to the VBUS regulator
  24. - maximum-speed: limit the maximum connection speed to "full-speed".
  25. - tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
  26. - itc-setting: interrupt threshold control register control, the setting
  27. should be aligned with ITC bits at register USBCMD.
  28. - ahb-burst-config: it is vendor dependent, the required value should be
  29. aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This
  30. property is used to change AHB burst configuration, check the chipidea
  31. spec for meaning of each value. If this property is not existed, it
  32. will use the reset value.
  33. - tx-burst-size-dword: it is vendor dependent, the tx burst size in dword
  34. (4 bytes), This register represents the maximum length of a the burst
  35. in 32-bit words while moving data from system memory to the USB
  36. bus, the value of this property will only take effect if property
  37. "ahb-burst-config" is set to 0, if this property is missing the reset
  38. default of the hardware implementation will be used.
  39. - rx-burst-size-dword: it is vendor dependent, the rx burst size in dword
  40. (4 bytes), This register represents the maximum length of a the burst
  41. in 32-bit words while moving data from the USB bus to system memory,
  42. the value of this property will only take effect if property
  43. "ahb-burst-config" is set to 0, if this property is missing the reset
  44. default of the hardware implementation will be used.
  45. - extcon: phandles to external connector devices. First phandle should point to
  46. external connector, which provide "USB" cable events, the second should point
  47. to external connector device, which provide "USB-HOST" cable events. If one
  48. of the external connector devices is not required, empty <0> phandle should
  49. be specified.
  50. - phy-clkgate-delay-us: the delay time (us) between putting the PHY into
  51. low power mode and gating the PHY clock.
  52. i.mx specific properties
  53. - fsl,usbmisc: phandler of non-core register device, with one
  54. argument that indicate usb controller index
  55. - disable-over-current: disable over current detect
  56. - external-vbus-divider: enables off-chip resistor divider for Vbus
  57. Example:
  58. usb@f7ed0000 {
  59. compatible = "chipidea,usb2";
  60. reg = <0xf7ed0000 0x10000>;
  61. interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
  62. clocks = <&chip CLKID_USB0>;
  63. phys = <&usb_phy0>;
  64. phy-names = "usb-phy";
  65. vbus-supply = <&reg_usb0_vbus>;
  66. gadget-itc-setting = <0x4>; /* 4 micro-frames */
  67. /* Incremental burst of unspecified length */
  68. ahb-burst-config = <0x0>;
  69. tx-burst-size-dword = <0x10>; /* 64 bytes */
  70. rx-burst-size-dword = <0x10>;
  71. extcon = <0>, <&usb_id>;
  72. phy-clkgate-delay-us = <400>;
  73. };