dwc2.txt 1.5 KB

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  1. Platform DesignWare HS OTG USB 2.0 controller
  2. -----------------------------------------------------
  3. Required properties:
  4. - compatible : One of:
  5. - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
  6. - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
  7. - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
  8. - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
  9. - snps,dwc2: A generic DWC2 USB controller with default parameters.
  10. - reg : Should contain 1 register range (address and length)
  11. - interrupts : Should contain 1 interrupt
  12. - clocks: clock provider specifier
  13. - clock-names: shall be "otg"
  14. Refer to clk/clock-bindings.txt for generic clock consumer properties
  15. Optional properties:
  16. - phys: phy provider specifier
  17. - phy-names: shall be "usb2-phy"
  18. Refer to phy/phy-bindings.txt for generic phy consumer properties
  19. - dr_mode: shall be one of "host", "peripheral" and "otg"
  20. Refer to usb/generic.txt
  21. - g-use-dma: enable dma usage in gadget driver.
  22. - g-rx-fifo-size: size of rx fifo size in gadget mode.
  23. - g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.
  24. - g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
  25. Example:
  26. usb@101c0000 {
  27. compatible = "ralink,rt3050-usb, snps,dwc2";
  28. reg = <0x101c0000 40000>;
  29. interrupts = <18>;
  30. clocks = <&usb_otg_ahb_clk>;
  31. clock-names = "otg";
  32. phys = <&usbphy>;
  33. phy-names = "usb2-phy";
  34. };