client.txt 7.6 KB

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  1. DMA Engine API Guide
  2. ====================
  3. Vinod Koul <vinod dot koul at intel.com>
  4. NOTE: For DMA Engine usage in async_tx please see:
  5. Documentation/crypto/async-tx-api.txt
  6. Below is a guide to device driver writers on how to use the Slave-DMA API of the
  7. DMA Engine. This is applicable only for slave DMA usage only.
  8. The slave DMA usage consists of following steps:
  9. 1. Allocate a DMA slave channel
  10. 2. Set slave and controller specific parameters
  11. 3. Get a descriptor for transaction
  12. 4. Submit the transaction
  13. 5. Issue pending requests and wait for callback notification
  14. 1. Allocate a DMA slave channel
  15. Channel allocation is slightly different in the slave DMA context,
  16. client drivers typically need a channel from a particular DMA
  17. controller only and even in some cases a specific channel is desired.
  18. To request a channel dma_request_channel() API is used.
  19. Interface:
  20. struct dma_chan *dma_request_channel(dma_cap_mask_t mask,
  21. dma_filter_fn filter_fn,
  22. void *filter_param);
  23. where dma_filter_fn is defined as:
  24. typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
  25. The 'filter_fn' parameter is optional, but highly recommended for
  26. slave and cyclic channels as they typically need to obtain a specific
  27. DMA channel.
  28. When the optional 'filter_fn' parameter is NULL, dma_request_channel()
  29. simply returns the first channel that satisfies the capability mask.
  30. Otherwise, the 'filter_fn' routine will be called once for each free
  31. channel which has a capability in 'mask'. 'filter_fn' is expected to
  32. return 'true' when the desired DMA channel is found.
  33. A channel allocated via this interface is exclusive to the caller,
  34. until dma_release_channel() is called.
  35. 2. Set slave and controller specific parameters
  36. Next step is always to pass some specific information to the DMA
  37. driver. Most of the generic information which a slave DMA can use
  38. is in struct dma_slave_config. This allows the clients to specify
  39. DMA direction, DMA addresses, bus widths, DMA burst lengths etc
  40. for the peripheral.
  41. If some DMA controllers have more parameters to be sent then they
  42. should try to embed struct dma_slave_config in their controller
  43. specific structure. That gives flexibility to client to pass more
  44. parameters, if required.
  45. Interface:
  46. int dmaengine_slave_config(struct dma_chan *chan,
  47. struct dma_slave_config *config)
  48. Please see the dma_slave_config structure definition in dmaengine.h
  49. for a detailed explanation of the struct members. Please note
  50. that the 'direction' member will be going away as it duplicates the
  51. direction given in the prepare call.
  52. 3. Get a descriptor for transaction
  53. For slave usage the various modes of slave transfers supported by the
  54. DMA-engine are:
  55. slave_sg - DMA a list of scatter gather buffers from/to a peripheral
  56. dma_cyclic - Perform a cyclic DMA operation from/to a peripheral till the
  57. operation is explicitly stopped.
  58. interleaved_dma - This is common to Slave as well as M2M clients. For slave
  59. address of devices' fifo could be already known to the driver.
  60. Various types of operations could be expressed by setting
  61. appropriate values to the 'dma_interleaved_template' members.
  62. A non-NULL return of this transfer API represents a "descriptor" for
  63. the given transaction.
  64. Interface:
  65. struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
  66. struct dma_chan *chan, struct scatterlist *sgl,
  67. unsigned int sg_len, enum dma_data_direction direction,
  68. unsigned long flags);
  69. struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
  70. struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
  71. size_t period_len, enum dma_data_direction direction);
  72. struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
  73. struct dma_chan *chan, struct dma_interleaved_template *xt,
  74. unsigned long flags);
  75. The peripheral driver is expected to have mapped the scatterlist for
  76. the DMA operation prior to calling dmaengine_prep_slave_sg(), and must
  77. keep the scatterlist mapped until the DMA operation has completed.
  78. The scatterlist must be mapped using the DMA struct device.
  79. If a mapping needs to be synchronized later, dma_sync_*_for_*() must be
  80. called using the DMA struct device, too.
  81. So, normal setup should look like this:
  82. nr_sg = dma_map_sg(chan->device->dev, sgl, sg_len);
  83. if (nr_sg == 0)
  84. /* error */
  85. desc = dmaengine_prep_slave_sg(chan, sgl, nr_sg, direction, flags);
  86. Once a descriptor has been obtained, the callback information can be
  87. added and the descriptor must then be submitted. Some DMA engine
  88. drivers may hold a spinlock between a successful preparation and
  89. submission so it is important that these two operations are closely
  90. paired.
  91. Note:
  92. Although the async_tx API specifies that completion callback
  93. routines cannot submit any new operations, this is not the
  94. case for slave/cyclic DMA.
  95. For slave DMA, the subsequent transaction may not be available
  96. for submission prior to callback function being invoked, so
  97. slave DMA callbacks are permitted to prepare and submit a new
  98. transaction.
  99. For cyclic DMA, a callback function may wish to terminate the
  100. DMA via dmaengine_terminate_all().
  101. Therefore, it is important that DMA engine drivers drop any
  102. locks before calling the callback function which may cause a
  103. deadlock.
  104. Note that callbacks will always be invoked from the DMA
  105. engines tasklet, never from interrupt context.
  106. 4. Submit the transaction
  107. Once the descriptor has been prepared and the callback information
  108. added, it must be placed on the DMA engine drivers pending queue.
  109. Interface:
  110. dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc)
  111. This returns a cookie can be used to check the progress of DMA engine
  112. activity via other DMA engine calls not covered in this document.
  113. dmaengine_submit() will not start the DMA operation, it merely adds
  114. it to the pending queue. For this, see step 5, dma_async_issue_pending.
  115. 5. Issue pending DMA requests and wait for callback notification
  116. The transactions in the pending queue can be activated by calling the
  117. issue_pending API. If channel is idle then the first transaction in
  118. queue is started and subsequent ones queued up.
  119. On completion of each DMA operation, the next in queue is started and
  120. a tasklet triggered. The tasklet will then call the client driver
  121. completion callback routine for notification, if set.
  122. Interface:
  123. void dma_async_issue_pending(struct dma_chan *chan);
  124. Further APIs:
  125. 1. int dmaengine_terminate_all(struct dma_chan *chan)
  126. This causes all activity for the DMA channel to be stopped, and may
  127. discard data in the DMA FIFO which hasn't been fully transferred.
  128. No callback functions will be called for any incomplete transfers.
  129. 2. int dmaengine_pause(struct dma_chan *chan)
  130. This pauses activity on the DMA channel without data loss.
  131. 3. int dmaengine_resume(struct dma_chan *chan)
  132. Resume a previously paused DMA channel. It is invalid to resume a
  133. channel which is not currently paused.
  134. 4. enum dma_status dma_async_is_tx_complete(struct dma_chan *chan,
  135. dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used)
  136. This can be used to check the status of the channel. Please see
  137. the documentation in include/linux/dmaengine.h for a more complete
  138. description of this API.
  139. This can be used in conjunction with dma_async_is_complete() and
  140. the cookie returned from dmaengine_submit() to check for
  141. completion of a specific DMA transaction.
  142. Note:
  143. Not all DMA engine drivers can return reliable information for
  144. a running DMA channel. It is recommended that DMA engine users
  145. pause or stop (via dmaengine_terminate_all()) the channel before
  146. using this API.