carrier.txt 14 KB

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  1. FMC Device
  2. **********
  3. Within the Linux bus framework, the FMC device is created and
  4. registered by the carrier driver. For example, the PCI driver for the
  5. SPEC card fills a data structure for each SPEC that it drives, and
  6. registers an associated FMC device for each card. The SVEC driver can
  7. do exactly the same for the VME carrier (actually, it should do it
  8. twice, because the SVEC carries two FMC mezzanines). Similarly, an
  9. Etherbone driver will be able to register its own FMC devices, offering
  10. communication primitives through frame exchange.
  11. The contents of the EEPROM within the FMC are used for identification
  12. purposes, i.e. for matching the device with its own driver. For this
  13. reason the device structure includes a complete copy of the EEPROM
  14. (actually, the carrier driver may choose whether or not to return it -
  15. for example we most likely won't have the whole EEPROM available for
  16. Etherbone devices.
  17. The following listing shows the current structure defining a device.
  18. Please note that all the machinery is in place but some details may
  19. still change in the future. For this reason, there is a version field
  20. at the beginning of the structure. As usual, the minor number will
  21. change for compatible changes (like a new flag) and the major number
  22. will increase when an incompatible change happens (for example, a
  23. change in layout of some fmc data structures). Device writers should
  24. just set it to the value FMC_VERSION, and be ready to get back -EINVAL
  25. at registration time.
  26. struct fmc_device {
  27. unsigned long version;
  28. unsigned long flags;
  29. struct module *owner; /* char device must pin it */
  30. struct fmc_fru_id id; /* for EEPROM-based match */
  31. struct fmc_operations *op; /* carrier-provided */
  32. int irq; /* according to host bus. 0 == none */
  33. int eeprom_len; /* Usually 8kB, may be less */
  34. int eeprom_addr; /* 0x50, 0x52 etc */
  35. uint8_t *eeprom; /* Full contents or leading part */
  36. char *carrier_name; /* "SPEC" or similar, for special use */
  37. void *carrier_data; /* "struct spec *" or equivalent */
  38. __iomem void *fpga_base; /* May be NULL (Etherbone) */
  39. __iomem void *slot_base; /* Set by the driver */
  40. struct fmc_device **devarray; /* Allocated by the bus */
  41. int slot_id; /* Index in the slot array */
  42. int nr_slots; /* Number of slots in this carrier */
  43. unsigned long memlen; /* Used for the char device */
  44. struct device dev; /* For Linux use */
  45. struct device *hwdev; /* The underlying hardware device */
  46. unsigned long sdbfs_entry;
  47. struct sdb_array *sdb;
  48. uint32_t device_id; /* Filled by the device */
  49. char *mezzanine_name; /* Defaults to ``fmc'' */
  50. void *mezzanine_data;
  51. };
  52. The meaning of most fields is summarized in the code comment above.
  53. The following fields must be filled by the carrier driver before
  54. registration:
  55. * version: must be set to FMC_VERSION.
  56. * owner: set to MODULE_OWNER.
  57. * op: the operations to act on the device.
  58. * irq: number for the mezzanine; may be zero.
  59. * eeprom_len: length of the following array.
  60. * eeprom_addr: 0x50 for first mezzanine and so on.
  61. * eeprom: the full content of the I2C EEPROM.
  62. * carrier_name.
  63. * carrier_data: a unique pointer for the carrier.
  64. * fpga_base: the I/O memory address (may be NULL).
  65. * slot_id: the index of this slot (starting from zero).
  66. * memlen: if fpga_base is valid, the length of I/O memory.
  67. * hwdev: to be used in some dev_err() calls.
  68. * device_id: a slot-specific unique integer number.
  69. Please note that the carrier should read its own EEPROM memory before
  70. registering the device, as well as fill all other fields listed above.
  71. The following fields should not be assigned, because they are filled
  72. later by either the bus or the device driver:
  73. * flags.
  74. * fru_id: filled by the bus, parsing the eeprom.
  75. * slot_base: filled and used by the driver, if useful to it.
  76. * devarray: an array og all mezzanines driven by a singe FPGA.
  77. * nr_slots: set by the core at registration time.
  78. * dev: used by Linux.
  79. * sdb: FPGA contents, scanned according to driver's directions.
  80. * sdbfs_entry: SDB entry point in EEPROM: autodetected.
  81. * mezzanine_data: available for the driver.
  82. * mezzanine_name: filled by fmc-bus during identification.
  83. Note: mezzanine_data may be redundant, because Linux offers the drvdata
  84. approach, so the field may be removed in later versions of this bus
  85. implementation.
  86. As I write this, she SPEC carrier is already completely functional in
  87. the fmc-bus environment, and is a good reference to look at.
  88. The API Offered by Carriers
  89. ===========================
  90. The carrier provides a number of methods by means of the
  91. `fmc_operations' structure, which currently is defined like this
  92. (again, it is a moving target, please refer to the header rather than
  93. this document):
  94. struct fmc_operations {
  95. uint32_t (*readl)(struct fmc_device *fmc, int offset);
  96. void (*writel)(struct fmc_device *fmc, uint32_t value, int offset);
  97. int (*reprogram)(struct fmc_device *f, struct fmc_driver *d, char *gw);
  98. int (*validate)(struct fmc_device *fmc, struct fmc_driver *drv);
  99. int (*irq_request)(struct fmc_device *fmc, irq_handler_t h,
  100. char *name, int flags);
  101. void (*irq_ack)(struct fmc_device *fmc);
  102. int (*irq_free)(struct fmc_device *fmc);
  103. int (*gpio_config)(struct fmc_device *fmc, struct fmc_gpio *gpio,
  104. int ngpio);
  105. int (*read_ee)(struct fmc_device *fmc, int pos, void *d, int l);
  106. int (*write_ee)(struct fmc_device *fmc, int pos, const void *d, int l);
  107. };
  108. The individual methods perform the following tasks:
  109. `readl'
  110. `writel'
  111. These functions access FPGA registers by whatever means the
  112. carrier offers. They are not expected to fail, and most of the time
  113. they will just make a memory access to the host bus. If the
  114. carrier provides a fpga_base pointer, the driver may use direct
  115. access through that pointer. For this reason the header offers the
  116. inline functions fmc_readl and fmc_writel that access fpga_base if
  117. the respective method is NULL. A driver that wants to be portable
  118. and efficient should use fmc_readl and fmc_writel. For Etherbone,
  119. or other non-local carriers, error-management is still to be
  120. defined.
  121. `validate'
  122. Module parameters are used to manage different applications for
  123. two or more boards of the same kind. Validation is based on the
  124. busid module parameter, if provided, and returns the matching
  125. index in the associated array. See *note Module Parameters:: in in
  126. doubt. If no match is found, `-ENOENT' is returned; if the user
  127. didn't pass `busid=', all devices will pass validation. The value
  128. returned by the validate method can be used as index into other
  129. parameters (for example, some drivers use the `lm32=' parameter in
  130. this way). Such "generic parameters" are documented in *note
  131. Module Parameters::, below. The validate method is used by
  132. `fmc-trivial.ko', described in *note fmc-trivial::.
  133. `reprogram'
  134. The carrier enumerates FMC devices by loading a standard (or
  135. golden) FPGA binary that allows EEPROM access. Each driver, then,
  136. will need to reprogram the FPGA by calling this function. If the
  137. name argument is NULL, the carrier should reprogram the golden
  138. binary. If the gateware name has been overridden through module
  139. parameters (in a carrier-specific way) the file loaded will match
  140. the parameters. Per-device gateware names can be specified using
  141. the `gateware=' parameter, see *note Module Parameters::. Note:
  142. Clients should call rhe new helper, fmc_reprogram, which both
  143. calls this method and parse the SDB tree of the FPGA.
  144. `irq_request'
  145. `irq_ack'
  146. `irq_free'
  147. Interrupt management is carrier-specific, so it is abstracted as
  148. operations. The interrupt number is listed in the device
  149. structure, and for the mezzanine driver the number is only
  150. informative. The handler will receive the fmc pointer as dev_id;
  151. the flags argument is passed to the Linux request_irq function,
  152. but fmc-specific flags may be added in the future. You'll most
  153. likely want to pass the `IRQF_SHARED' flag.
  154. `gpio_config'
  155. The method allows to configure a GPIO pin in the carrier, and read
  156. its current value if it is configured as input. See *note The GPIO
  157. Abstraction:: for details.
  158. `read_ee'
  159. `write_ee'
  160. Read or write the EEPROM. The functions are expected to be only
  161. called before reprogramming and the carrier should refuse them
  162. with `ENODEV' after reprogramming. The offset is expected to be
  163. within 8kB (the current size), but addresses up to 1MB are
  164. reserved to fit bigger I2C devices in the future. Carriers may
  165. offer access to other internal flash memories using these same
  166. methods: for example the SPEC driver may define that its carrier
  167. I2C memory is seen at offset 1M and the internal SPI flash is seen
  168. at offset 16M. This multiplexing of several flash memories in the
  169. same address space is carrier-specific and should only be used
  170. by a driver that has verified the `carrier_name' field.
  171. The GPIO Abstraction
  172. ====================
  173. Support for GPIO pins in the fmc-bus environment is not very
  174. straightforward and deserves special discussion.
  175. While the general idea of a carrier-independent driver seems to fly,
  176. configuration of specific signals within the carrier needs at least
  177. some knowledge of the carrier itself. For this reason, the specific
  178. driver can request to configure carrier-specific GPIO pins, numbered
  179. from 0 to at most 4095. Configuration is performed by passing a
  180. pointer to an array of struct fmc_gpio items, as well as the length of
  181. the array. This is the data structure:
  182. struct fmc_gpio {
  183. char *carrier_name;
  184. int gpio;
  185. int _gpio; /* internal use by the carrier */
  186. int mode; /* GPIOF_DIR_OUT etc, from <linux/gpio.h> */
  187. int irqmode; /* IRQF_TRIGGER_LOW and so on */
  188. };
  189. By specifying a carrier_name for each pin, the driver may access
  190. different pins in different carriers. The gpio_config method is
  191. expected to return the number of pins successfully configured, ignoring
  192. requests for other carriers. However, if no pin is configured (because
  193. no structure at all refers to the current carrier_name), the operation
  194. returns an error so the caller will know that it is running under a
  195. yet-unsupported carrier.
  196. So, for example, a driver that has been developed and tested on both
  197. the SPEC and the SVEC may request configuration of two different GPIO
  198. pins, and expect one such configuration to succeed - if none succeeds
  199. it most likely means that the current carrier is a still-unknown one.
  200. If, however, your GPIO pin has a specific known role, you can pass a
  201. special number in the gpio field, using one of the following macros:
  202. #define FMC_GPIO_RAW(x) (x) /* 4096 of them */
  203. #define FMC_GPIO_IRQ(x) ((x) + 0x1000) /* 256 of them */
  204. #define FMC_GPIO_LED(x) ((x) + 0x1100) /* 256 of them */
  205. #define FMC_GPIO_KEY(x) ((x) + 0x1200) /* 256 of them */
  206. #define FMC_GPIO_TP(x) ((x) + 0x1300) /* 256 of them */
  207. #define FMC_GPIO_USER(x) ((x) + 0x1400) /* 256 of them */
  208. Use of virtual GPIO numbers (anything but FMC_GPIO_RAW) is allowed
  209. provided the carrier_name field in the data structure is left
  210. unspecified (NULL). Each carrier is responsible for providing a mapping
  211. between virtual and physical GPIO numbers. The carrier may then use the
  212. _gpio field to cache the result of this mapping.
  213. All carriers must map their I/O lines to the sets above starting from
  214. zero. The SPEC, for example, maps interrupt pins 0 and 1, and test
  215. points 0 through 3 (even if the test points on the PCB are called
  216. 5,6,7,8).
  217. If, for example, a driver requires a free LED and a test point (for a
  218. scope probe to be plugged at some point during development) it may ask
  219. for FMC_GPIO_LED(0) and FMC_GPIO_TP(0). Each carrier will provide
  220. suitable GPIO pins. Clearly, the person running the drivers will know
  221. the order used by the specific carrier driver in assigning leds and
  222. testpoints, so to make a carrier-dependent use of the diagnostic tools.
  223. In theory, some form of autodetection should be possible: a driver like
  224. the wr-nic (which uses IRQ(1) on the SPEC card) should configure
  225. IRQ(0), make a test with software-generated interrupts and configure
  226. IRQ(1) if the test fails. This probing step should be used because even
  227. if the wr-nic gateware is known to use IRQ1 on the SPEC, the driver
  228. should be carrier-independent and thus use IRQ(0) as a first bet -
  229. actually, the knowledge that IRQ0 may fail is carrier-dependent
  230. information, but using it doesn't make the driver unsuitable for other
  231. carriers.
  232. The return value of gpio_config is defined as follows:
  233. * If no pin in the array can be used by the carrier, `-ENODEV'.
  234. * If at least one virtual GPIO number cannot be mapped, `-ENOENT'.
  235. * On success, 0 or positive. The value returned is the number of
  236. high input bits (if no input is configured, the value for success
  237. is 0).
  238. While I admit the procedure is not completely straightforward, it
  239. allows configuration, input and output with a single carrier operation.
  240. Given the typical use case of FMC devices, GPIO operations are not
  241. expected to ever by in hot paths, and GPIO access so fare has only been
  242. used to configure the interrupt pin, mode and polarity. Especially
  243. reading inputs is not expected to be common. If your device has GPIO
  244. capabilities in the hot path, you should consider using the kernel's
  245. GPIO mechanisms.