axc001.dtsi 2.4 KB

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  1. /*
  2. * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /*
  9. * Device tree for AXC001 770D/EM6/AS221 CPU card
  10. * Note that this file only supports the 770D CPU
  11. */
  12. / {
  13. compatible = "snps,arc";
  14. clock-frequency = <750000000>; /* 750 MHZ */
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. cpu_card {
  18. compatible = "simple-bus";
  19. #address-cells = <1>;
  20. #size-cells = <1>;
  21. ranges = <0x00000000 0xf0000000 0x10000000>;
  22. cpu_intc: arc700-intc@cpu {
  23. compatible = "snps,arc700-intc";
  24. interrupt-controller;
  25. #interrupt-cells = <1>;
  26. };
  27. /*
  28. * this GPIO block ORs all interrupts on CPU card (creg,..)
  29. * to uplink only 1 IRQ to ARC core intc
  30. */
  31. dw-apb-gpio@0x2000 {
  32. compatible = "snps,dw-apb-gpio";
  33. reg = < 0x2000 0x80 >;
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. ictl_intc: gpio-controller@0 {
  37. compatible = "snps,dw-apb-gpio-port";
  38. gpio-controller;
  39. #gpio-cells = <2>;
  40. snps,nr-gpios = <30>;
  41. reg = <0>;
  42. interrupt-controller;
  43. #interrupt-cells = <2>;
  44. interrupt-parent = <&cpu_intc>;
  45. interrupts = <15>;
  46. };
  47. };
  48. debug_uart: dw-apb-uart@0x5000 {
  49. compatible = "snps,dw-apb-uart";
  50. reg = <0x5000 0x100>;
  51. clock-frequency = <33333000>;
  52. interrupt-parent = <&ictl_intc>;
  53. interrupts = <19 4>;
  54. baud = <115200>;
  55. reg-shift = <2>;
  56. reg-io-width = <4>;
  57. };
  58. arcpmu0: pmu {
  59. compatible = "snps,arc700-pct";
  60. };
  61. };
  62. /*
  63. * This INTC is actually connected to DW APB GPIO
  64. * which acts as a wire between MB INTC and CPU INTC.
  65. * GPIO INTC is configured in platform init code
  66. * and here we mimic direct connection from MB INTC to
  67. * CPU INTC, thus we set "interrupts = <7>" instead of
  68. * "interrupts = <12>"
  69. *
  70. * This intc actually resides on MB, but we move it here to
  71. * avoid duplicating the MB dtsi file given that IRQ from
  72. * this intc to cpu intc are different for axs101 and axs103
  73. */
  74. mb_intc: dw-apb-ictl@0xe0012000 {
  75. #interrupt-cells = <1>;
  76. compatible = "snps,dw-apb-ictl";
  77. reg = < 0xe0012000 0x200 >;
  78. interrupt-controller;
  79. interrupt-parent = <&cpu_intc>;
  80. interrupts = < 7 >;
  81. };
  82. memory {
  83. #address-cells = <1>;
  84. #size-cells = <1>;
  85. ranges = <0x00000000 0x80000000 0x40000000>;
  86. device_type = "memory";
  87. reg = <0x80000000 0x20000000>; /* 512MiB */
  88. };
  89. };