vdk_axc003_idu.dtsi 1.6 KB

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  1. /*
  2. * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /*
  9. * Device tree for AXC003 CPU card:
  10. * HS38x2 (Dual Core) with IDU intc (VDK version)
  11. */
  12. / {
  13. compatible = "snps,arc";
  14. clock-frequency = <50000000>;
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. cpu_card {
  18. compatible = "simple-bus";
  19. #address-cells = <1>;
  20. #size-cells = <1>;
  21. ranges = <0x00000000 0xf0000000 0x10000000>;
  22. cpu_intc: archs-intc@cpu {
  23. compatible = "snps,archs-intc";
  24. interrupt-controller;
  25. #interrupt-cells = <1>;
  26. };
  27. idu_intc: idu-interrupt-controller {
  28. compatible = "snps,archs-idu-intc";
  29. interrupt-controller;
  30. interrupt-parent = <&cpu_intc>;
  31. /*
  32. * <hwirq distribution>
  33. * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
  34. */
  35. #interrupt-cells = <2>;
  36. interrupts = <24 25 26 27>;
  37. };
  38. debug_uart: dw-apb-uart@0x5000 {
  39. compatible = "snps,dw-apb-uart";
  40. reg = <0x5000 0x100>;
  41. clock-frequency = <2403200>;
  42. interrupt-parent = <&idu_intc>;
  43. interrupts = <2 0>;
  44. baud = <115200>;
  45. reg-shift = <2>;
  46. reg-io-width = <4>;
  47. };
  48. };
  49. mb_intc: dw-apb-ictl@0xe0012000 {
  50. #interrupt-cells = <1>;
  51. compatible = "snps,dw-apb-ictl";
  52. reg = < 0xe0012000 0x200 >;
  53. interrupt-controller;
  54. interrupt-parent = <&idu_intc>;
  55. interrupts = < 0 0 >;
  56. };
  57. memory {
  58. #address-cells = <1>;
  59. #size-cells = <1>;
  60. ranges = <0x00000000 0x80000000 0x40000000>;
  61. device_type = "memory";
  62. reg = <0x80000000 0x20000000>; /* 512MiB */
  63. };
  64. };