mmu.h 2.3 KB

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  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #ifndef _ASM_ARC_MMU_H
  9. #define _ASM_ARC_MMU_H
  10. #if defined(CONFIG_ARC_MMU_V1)
  11. #define CONFIG_ARC_MMU_VER 1
  12. #elif defined(CONFIG_ARC_MMU_V2)
  13. #define CONFIG_ARC_MMU_VER 2
  14. #elif defined(CONFIG_ARC_MMU_V3)
  15. #define CONFIG_ARC_MMU_VER 3
  16. #elif defined(CONFIG_ARC_MMU_V4)
  17. #define CONFIG_ARC_MMU_VER 4
  18. #endif
  19. /* MMU Management regs */
  20. #define ARC_REG_MMU_BCR 0x06f
  21. #if (CONFIG_ARC_MMU_VER < 4)
  22. #define ARC_REG_TLBPD0 0x405
  23. #define ARC_REG_TLBPD1 0x406
  24. #define ARC_REG_TLBPD1HI 0 /* Dummy: allows code sharing with ARC700 */
  25. #define ARC_REG_TLBINDEX 0x407
  26. #define ARC_REG_TLBCOMMAND 0x408
  27. #define ARC_REG_PID 0x409
  28. #define ARC_REG_SCRATCH_DATA0 0x418
  29. #else
  30. #define ARC_REG_TLBPD0 0x460
  31. #define ARC_REG_TLBPD1 0x461
  32. #define ARC_REG_TLBPD1HI 0x463
  33. #define ARC_REG_TLBINDEX 0x464
  34. #define ARC_REG_TLBCOMMAND 0x465
  35. #define ARC_REG_PID 0x468
  36. #define ARC_REG_SCRATCH_DATA0 0x46c
  37. #endif
  38. /* Bits in MMU PID register */
  39. #define __TLB_ENABLE (1 << 31)
  40. #define __PROG_ENABLE (1 << 30)
  41. #define MMU_ENABLE (__TLB_ENABLE | __PROG_ENABLE)
  42. /* Error code if probe fails */
  43. #define TLB_LKUP_ERR 0x80000000
  44. #if (CONFIG_ARC_MMU_VER < 4)
  45. #define TLB_DUP_ERR (TLB_LKUP_ERR | 0x00000001)
  46. #else
  47. #define TLB_DUP_ERR (TLB_LKUP_ERR | 0x40000000)
  48. #endif
  49. /* TLB Commands */
  50. #define TLBWrite 0x1
  51. #define TLBRead 0x2
  52. #define TLBGetIndex 0x3
  53. #define TLBProbe 0x4
  54. #if (CONFIG_ARC_MMU_VER >= 2)
  55. #define TLBWriteNI 0x5 /* write JTLB without inv uTLBs */
  56. #define TLBIVUTLB 0x6 /* explicitly inv uTLBs */
  57. #endif
  58. #if (CONFIG_ARC_MMU_VER >= 4)
  59. #define TLBInsertEntry 0x7
  60. #define TLBDeleteEntry 0x8
  61. #endif
  62. #ifndef __ASSEMBLY__
  63. typedef struct {
  64. unsigned long asid[NR_CPUS]; /* 8 bit MMU PID + Generation cycle */
  65. } mm_context_t;
  66. #ifdef CONFIG_ARC_DBG_TLB_PARANOIA
  67. void tlb_paranoid_check(unsigned int mm_asid, unsigned long address);
  68. #else
  69. #define tlb_paranoid_check(a, b)
  70. #endif
  71. void arc_mmu_init(void);
  72. extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);
  73. void read_decode_mmu_bcr(void);
  74. static inline int is_pae40_enabled(void)
  75. {
  76. return IS_ENABLED(CONFIG_ARC_HAS_PAE40);
  77. }
  78. #endif /* !__ASSEMBLY__ */
  79. #endif