thunder-88xx.dtsi 10 KB

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  1. /*
  2. * Cavium Thunder DTS file - Thunder SoC description
  3. *
  4. * Copyright (C) 2014, Cavium Inc.
  5. *
  6. * This file is dual-licensed: you can use it either under the terms
  7. * of the GPL or the X11 license, at your option. Note that this dual
  8. * licensing only applies to this file, and not this project as a
  9. * whole.
  10. *
  11. * a) This library is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of the
  14. * License, or (at your option) any later version.
  15. *
  16. * This library is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public
  22. * License along with this library; if not, write to the Free
  23. * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  24. * MA 02110-1301 USA
  25. *
  26. * Or, alternatively,
  27. *
  28. * b) Permission is hereby granted, free of charge, to any person
  29. * obtaining a copy of this software and associated documentation
  30. * files (the "Software"), to deal in the Software without
  31. * restriction, including without limitation the rights to use,
  32. * copy, modify, merge, publish, distribute, sublicense, and/or
  33. * sell copies of the Software, and to permit persons to whom the
  34. * Software is furnished to do so, subject to the following
  35. * conditions:
  36. *
  37. * The above copyright notice and this permission notice shall be
  38. * included in all copies or substantial portions of the Software.
  39. *
  40. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  41. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  42. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  43. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  44. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  45. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  46. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  47. * OTHER DEALINGS IN THE SOFTWARE.
  48. */
  49. / {
  50. compatible = "cavium,thunder-88xx";
  51. interrupt-parent = <&gic0>;
  52. #address-cells = <2>;
  53. #size-cells = <2>;
  54. psci {
  55. compatible = "arm,psci-0.2";
  56. method = "smc";
  57. };
  58. cpus {
  59. #address-cells = <2>;
  60. #size-cells = <0>;
  61. cpu@000 {
  62. device_type = "cpu";
  63. compatible = "cavium,thunder", "arm,armv8";
  64. reg = <0x0 0x000>;
  65. enable-method = "psci";
  66. };
  67. cpu@001 {
  68. device_type = "cpu";
  69. compatible = "cavium,thunder", "arm,armv8";
  70. reg = <0x0 0x001>;
  71. enable-method = "psci";
  72. };
  73. cpu@002 {
  74. device_type = "cpu";
  75. compatible = "cavium,thunder", "arm,armv8";
  76. reg = <0x0 0x002>;
  77. enable-method = "psci";
  78. };
  79. cpu@003 {
  80. device_type = "cpu";
  81. compatible = "cavium,thunder", "arm,armv8";
  82. reg = <0x0 0x003>;
  83. enable-method = "psci";
  84. };
  85. cpu@004 {
  86. device_type = "cpu";
  87. compatible = "cavium,thunder", "arm,armv8";
  88. reg = <0x0 0x004>;
  89. enable-method = "psci";
  90. };
  91. cpu@005 {
  92. device_type = "cpu";
  93. compatible = "cavium,thunder", "arm,armv8";
  94. reg = <0x0 0x005>;
  95. enable-method = "psci";
  96. };
  97. cpu@006 {
  98. device_type = "cpu";
  99. compatible = "cavium,thunder", "arm,armv8";
  100. reg = <0x0 0x006>;
  101. enable-method = "psci";
  102. };
  103. cpu@007 {
  104. device_type = "cpu";
  105. compatible = "cavium,thunder", "arm,armv8";
  106. reg = <0x0 0x007>;
  107. enable-method = "psci";
  108. };
  109. cpu@008 {
  110. device_type = "cpu";
  111. compatible = "cavium,thunder", "arm,armv8";
  112. reg = <0x0 0x008>;
  113. enable-method = "psci";
  114. };
  115. cpu@009 {
  116. device_type = "cpu";
  117. compatible = "cavium,thunder", "arm,armv8";
  118. reg = <0x0 0x009>;
  119. enable-method = "psci";
  120. };
  121. cpu@00a {
  122. device_type = "cpu";
  123. compatible = "cavium,thunder", "arm,armv8";
  124. reg = <0x0 0x00a>;
  125. enable-method = "psci";
  126. };
  127. cpu@00b {
  128. device_type = "cpu";
  129. compatible = "cavium,thunder", "arm,armv8";
  130. reg = <0x0 0x00b>;
  131. enable-method = "psci";
  132. };
  133. cpu@00c {
  134. device_type = "cpu";
  135. compatible = "cavium,thunder", "arm,armv8";
  136. reg = <0x0 0x00c>;
  137. enable-method = "psci";
  138. };
  139. cpu@00d {
  140. device_type = "cpu";
  141. compatible = "cavium,thunder", "arm,armv8";
  142. reg = <0x0 0x00d>;
  143. enable-method = "psci";
  144. };
  145. cpu@00e {
  146. device_type = "cpu";
  147. compatible = "cavium,thunder", "arm,armv8";
  148. reg = <0x0 0x00e>;
  149. enable-method = "psci";
  150. };
  151. cpu@00f {
  152. device_type = "cpu";
  153. compatible = "cavium,thunder", "arm,armv8";
  154. reg = <0x0 0x00f>;
  155. enable-method = "psci";
  156. };
  157. cpu@100 {
  158. device_type = "cpu";
  159. compatible = "cavium,thunder", "arm,armv8";
  160. reg = <0x0 0x100>;
  161. enable-method = "psci";
  162. };
  163. cpu@101 {
  164. device_type = "cpu";
  165. compatible = "cavium,thunder", "arm,armv8";
  166. reg = <0x0 0x101>;
  167. enable-method = "psci";
  168. };
  169. cpu@102 {
  170. device_type = "cpu";
  171. compatible = "cavium,thunder", "arm,armv8";
  172. reg = <0x0 0x102>;
  173. enable-method = "psci";
  174. };
  175. cpu@103 {
  176. device_type = "cpu";
  177. compatible = "cavium,thunder", "arm,armv8";
  178. reg = <0x0 0x103>;
  179. enable-method = "psci";
  180. };
  181. cpu@104 {
  182. device_type = "cpu";
  183. compatible = "cavium,thunder", "arm,armv8";
  184. reg = <0x0 0x104>;
  185. enable-method = "psci";
  186. };
  187. cpu@105 {
  188. device_type = "cpu";
  189. compatible = "cavium,thunder", "arm,armv8";
  190. reg = <0x0 0x105>;
  191. enable-method = "psci";
  192. };
  193. cpu@106 {
  194. device_type = "cpu";
  195. compatible = "cavium,thunder", "arm,armv8";
  196. reg = <0x0 0x106>;
  197. enable-method = "psci";
  198. };
  199. cpu@107 {
  200. device_type = "cpu";
  201. compatible = "cavium,thunder", "arm,armv8";
  202. reg = <0x0 0x107>;
  203. enable-method = "psci";
  204. };
  205. cpu@108 {
  206. device_type = "cpu";
  207. compatible = "cavium,thunder", "arm,armv8";
  208. reg = <0x0 0x108>;
  209. enable-method = "psci";
  210. };
  211. cpu@109 {
  212. device_type = "cpu";
  213. compatible = "cavium,thunder", "arm,armv8";
  214. reg = <0x0 0x109>;
  215. enable-method = "psci";
  216. };
  217. cpu@10a {
  218. device_type = "cpu";
  219. compatible = "cavium,thunder", "arm,armv8";
  220. reg = <0x0 0x10a>;
  221. enable-method = "psci";
  222. };
  223. cpu@10b {
  224. device_type = "cpu";
  225. compatible = "cavium,thunder", "arm,armv8";
  226. reg = <0x0 0x10b>;
  227. enable-method = "psci";
  228. };
  229. cpu@10c {
  230. device_type = "cpu";
  231. compatible = "cavium,thunder", "arm,armv8";
  232. reg = <0x0 0x10c>;
  233. enable-method = "psci";
  234. };
  235. cpu@10d {
  236. device_type = "cpu";
  237. compatible = "cavium,thunder", "arm,armv8";
  238. reg = <0x0 0x10d>;
  239. enable-method = "psci";
  240. };
  241. cpu@10e {
  242. device_type = "cpu";
  243. compatible = "cavium,thunder", "arm,armv8";
  244. reg = <0x0 0x10e>;
  245. enable-method = "psci";
  246. };
  247. cpu@10f {
  248. device_type = "cpu";
  249. compatible = "cavium,thunder", "arm,armv8";
  250. reg = <0x0 0x10f>;
  251. enable-method = "psci";
  252. };
  253. cpu@200 {
  254. device_type = "cpu";
  255. compatible = "cavium,thunder", "arm,armv8";
  256. reg = <0x0 0x200>;
  257. enable-method = "psci";
  258. };
  259. cpu@201 {
  260. device_type = "cpu";
  261. compatible = "cavium,thunder", "arm,armv8";
  262. reg = <0x0 0x201>;
  263. enable-method = "psci";
  264. };
  265. cpu@202 {
  266. device_type = "cpu";
  267. compatible = "cavium,thunder", "arm,armv8";
  268. reg = <0x0 0x202>;
  269. enable-method = "psci";
  270. };
  271. cpu@203 {
  272. device_type = "cpu";
  273. compatible = "cavium,thunder", "arm,armv8";
  274. reg = <0x0 0x203>;
  275. enable-method = "psci";
  276. };
  277. cpu@204 {
  278. device_type = "cpu";
  279. compatible = "cavium,thunder", "arm,armv8";
  280. reg = <0x0 0x204>;
  281. enable-method = "psci";
  282. };
  283. cpu@205 {
  284. device_type = "cpu";
  285. compatible = "cavium,thunder", "arm,armv8";
  286. reg = <0x0 0x205>;
  287. enable-method = "psci";
  288. };
  289. cpu@206 {
  290. device_type = "cpu";
  291. compatible = "cavium,thunder", "arm,armv8";
  292. reg = <0x0 0x206>;
  293. enable-method = "psci";
  294. };
  295. cpu@207 {
  296. device_type = "cpu";
  297. compatible = "cavium,thunder", "arm,armv8";
  298. reg = <0x0 0x207>;
  299. enable-method = "psci";
  300. };
  301. cpu@208 {
  302. device_type = "cpu";
  303. compatible = "cavium,thunder", "arm,armv8";
  304. reg = <0x0 0x208>;
  305. enable-method = "psci";
  306. };
  307. cpu@209 {
  308. device_type = "cpu";
  309. compatible = "cavium,thunder", "arm,armv8";
  310. reg = <0x0 0x209>;
  311. enable-method = "psci";
  312. };
  313. cpu@20a {
  314. device_type = "cpu";
  315. compatible = "cavium,thunder", "arm,armv8";
  316. reg = <0x0 0x20a>;
  317. enable-method = "psci";
  318. };
  319. cpu@20b {
  320. device_type = "cpu";
  321. compatible = "cavium,thunder", "arm,armv8";
  322. reg = <0x0 0x20b>;
  323. enable-method = "psci";
  324. };
  325. cpu@20c {
  326. device_type = "cpu";
  327. compatible = "cavium,thunder", "arm,armv8";
  328. reg = <0x0 0x20c>;
  329. enable-method = "psci";
  330. };
  331. cpu@20d {
  332. device_type = "cpu";
  333. compatible = "cavium,thunder", "arm,armv8";
  334. reg = <0x0 0x20d>;
  335. enable-method = "psci";
  336. };
  337. cpu@20e {
  338. device_type = "cpu";
  339. compatible = "cavium,thunder", "arm,armv8";
  340. reg = <0x0 0x20e>;
  341. enable-method = "psci";
  342. };
  343. cpu@20f {
  344. device_type = "cpu";
  345. compatible = "cavium,thunder", "arm,armv8";
  346. reg = <0x0 0x20f>;
  347. enable-method = "psci";
  348. };
  349. };
  350. timer {
  351. compatible = "arm,armv8-timer";
  352. interrupts = <1 13 0xff01>,
  353. <1 14 0xff01>,
  354. <1 11 0xff01>,
  355. <1 10 0xff01>;
  356. };
  357. soc {
  358. compatible = "simple-bus";
  359. #address-cells = <2>;
  360. #size-cells = <2>;
  361. ranges;
  362. refclk50mhz: refclk50mhz {
  363. compatible = "fixed-clock";
  364. #clock-cells = <0>;
  365. clock-frequency = <50000000>;
  366. clock-output-names = "refclk50mhz";
  367. };
  368. gic0: interrupt-controller@8010,00000000 {
  369. compatible = "arm,gic-v3";
  370. #interrupt-cells = <3>;
  371. #address-cells = <2>;
  372. #size-cells = <2>;
  373. ranges;
  374. interrupt-controller;
  375. reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
  376. <0x8010 0x80000000 0x0 0x600000>; /* GICR */
  377. interrupts = <1 9 0xf04>;
  378. its: gic-its@8010,00020000 {
  379. compatible = "arm,gic-v3-its";
  380. msi-controller;
  381. reg = <0x8010 0x20000 0x0 0x200000>;
  382. };
  383. };
  384. uaa0: serial@87e0,24000000 {
  385. compatible = "arm,pl011", "arm,primecell";
  386. reg = <0x87e0 0x24000000 0x0 0x1000>;
  387. interrupts = <1 21 4>;
  388. clocks = <&refclk50mhz>;
  389. clock-names = "apb_pclk";
  390. };
  391. uaa1: serial@87e0,25000000 {
  392. compatible = "arm,pl011", "arm,primecell";
  393. reg = <0x87e0 0x25000000 0x0 0x1000>;
  394. interrupts = <1 22 4>;
  395. clocks = <&refclk50mhz>;
  396. clock-names = "apb_pclk";
  397. };
  398. };
  399. };