mt8173-evb.dts 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410
  1. /*
  2. * Copyright (c) 2014 MediaTek Inc.
  3. * Author: Eddie Huang <eddie.huang@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. /dts-v1/;
  15. #include "mt8173.dtsi"
  16. / {
  17. model = "MediaTek MT8173 evaluation board";
  18. compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
  19. aliases {
  20. serial0 = &uart0;
  21. serial1 = &uart1;
  22. serial2 = &uart2;
  23. serial3 = &uart3;
  24. };
  25. memory@40000000 {
  26. device_type = "memory";
  27. reg = <0 0x40000000 0 0x80000000>;
  28. };
  29. chosen { };
  30. };
  31. &i2c1 {
  32. status = "okay";
  33. buck: da9211@68 {
  34. compatible = "dlg,da9211";
  35. reg = <0x68>;
  36. regulators {
  37. da9211_vcpu_reg: BUCKA {
  38. regulator-name = "VBUCKA";
  39. regulator-min-microvolt = < 700000>;
  40. regulator-max-microvolt = <1310000>;
  41. regulator-min-microamp = <2000000>;
  42. regulator-max-microamp = <4400000>;
  43. regulator-ramp-delay = <10000>;
  44. regulator-always-on;
  45. };
  46. da9211_vgpu_reg: BUCKB {
  47. regulator-name = "VBUCKB";
  48. regulator-min-microvolt = < 700000>;
  49. regulator-max-microvolt = <1310000>;
  50. regulator-min-microamp = <2000000>;
  51. regulator-max-microamp = <3000000>;
  52. regulator-ramp-delay = <10000>;
  53. };
  54. };
  55. };
  56. };
  57. &mmc0 {
  58. status = "okay";
  59. pinctrl-names = "default", "state_uhs";
  60. pinctrl-0 = <&mmc0_pins_default>;
  61. pinctrl-1 = <&mmc0_pins_uhs>;
  62. bus-width = <8>;
  63. max-frequency = <50000000>;
  64. cap-mmc-highspeed;
  65. vmmc-supply = <&mt6397_vemc_3v3_reg>;
  66. vqmmc-supply = <&mt6397_vio18_reg>;
  67. non-removable;
  68. };
  69. &mmc1 {
  70. status = "okay";
  71. pinctrl-names = "default", "state_uhs";
  72. pinctrl-0 = <&mmc1_pins_default>;
  73. pinctrl-1 = <&mmc1_pins_uhs>;
  74. bus-width = <4>;
  75. max-frequency = <50000000>;
  76. cap-sd-highspeed;
  77. sd-uhs-sdr25;
  78. cd-gpios = <&pio 132 0>;
  79. vmmc-supply = <&mt6397_vmch_reg>;
  80. vqmmc-supply = <&mt6397_vmc_reg>;
  81. };
  82. &pio {
  83. mmc0_pins_default: mmc0default {
  84. pins_cmd_dat {
  85. pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
  86. <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
  87. <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
  88. <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
  89. <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
  90. <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
  91. <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
  92. <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
  93. <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
  94. input-enable;
  95. bias-pull-up;
  96. };
  97. pins_clk {
  98. pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
  99. bias-pull-down;
  100. };
  101. pins_rst {
  102. pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
  103. bias-pull-up;
  104. };
  105. };
  106. mmc1_pins_default: mmc1default {
  107. pins_cmd_dat {
  108. pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
  109. <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
  110. <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
  111. <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
  112. <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
  113. input-enable;
  114. drive-strength = <MTK_DRIVE_4mA>;
  115. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  116. };
  117. pins_clk {
  118. pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
  119. bias-pull-down;
  120. drive-strength = <MTK_DRIVE_4mA>;
  121. };
  122. pins_insert {
  123. pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
  124. bias-pull-up;
  125. };
  126. };
  127. mmc0_pins_uhs: mmc0 {
  128. pins_cmd_dat {
  129. pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
  130. <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
  131. <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
  132. <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
  133. <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
  134. <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
  135. <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
  136. <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
  137. <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
  138. input-enable;
  139. drive-strength = <MTK_DRIVE_2mA>;
  140. bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  141. };
  142. pins_clk {
  143. pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
  144. drive-strength = <MTK_DRIVE_2mA>;
  145. bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
  146. };
  147. pins_rst {
  148. pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
  149. bias-pull-up;
  150. };
  151. };
  152. mmc1_pins_uhs: mmc1 {
  153. pins_cmd_dat {
  154. pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
  155. <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
  156. <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
  157. <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
  158. <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
  159. input-enable;
  160. drive-strength = <MTK_DRIVE_4mA>;
  161. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  162. };
  163. pins_clk {
  164. pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
  165. drive-strength = <MTK_DRIVE_4mA>;
  166. bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
  167. };
  168. };
  169. };
  170. &pwrap {
  171. pmic: mt6397 {
  172. compatible = "mediatek,mt6397";
  173. interrupt-parent = <&pio>;
  174. interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
  175. interrupt-controller;
  176. #interrupt-cells = <2>;
  177. mt6397regulator: mt6397regulator {
  178. compatible = "mediatek,mt6397-regulator";
  179. mt6397_vpca15_reg: buck_vpca15 {
  180. regulator-compatible = "buck_vpca15";
  181. regulator-name = "vpca15";
  182. regulator-min-microvolt = < 700000>;
  183. regulator-max-microvolt = <1350000>;
  184. regulator-ramp-delay = <12500>;
  185. regulator-always-on;
  186. };
  187. mt6397_vpca7_reg: buck_vpca7 {
  188. regulator-compatible = "buck_vpca7";
  189. regulator-name = "vpca7";
  190. regulator-min-microvolt = < 700000>;
  191. regulator-max-microvolt = <1350000>;
  192. regulator-ramp-delay = <12500>;
  193. regulator-enable-ramp-delay = <115>;
  194. };
  195. mt6397_vsramca15_reg: buck_vsramca15 {
  196. regulator-compatible = "buck_vsramca15";
  197. regulator-name = "vsramca15";
  198. regulator-min-microvolt = < 700000>;
  199. regulator-max-microvolt = <1350000>;
  200. regulator-ramp-delay = <12500>;
  201. regulator-always-on;
  202. };
  203. mt6397_vsramca7_reg: buck_vsramca7 {
  204. regulator-compatible = "buck_vsramca7";
  205. regulator-name = "vsramca7";
  206. regulator-min-microvolt = < 700000>;
  207. regulator-max-microvolt = <1350000>;
  208. regulator-ramp-delay = <12500>;
  209. regulator-always-on;
  210. };
  211. mt6397_vcore_reg: buck_vcore {
  212. regulator-compatible = "buck_vcore";
  213. regulator-name = "vcore";
  214. regulator-min-microvolt = < 700000>;
  215. regulator-max-microvolt = <1350000>;
  216. regulator-ramp-delay = <12500>;
  217. regulator-always-on;
  218. };
  219. mt6397_vgpu_reg: buck_vgpu {
  220. regulator-compatible = "buck_vgpu";
  221. regulator-name = "vgpu";
  222. regulator-min-microvolt = < 700000>;
  223. regulator-max-microvolt = <1350000>;
  224. regulator-ramp-delay = <12500>;
  225. regulator-enable-ramp-delay = <115>;
  226. };
  227. mt6397_vdrm_reg: buck_vdrm {
  228. regulator-compatible = "buck_vdrm";
  229. regulator-name = "vdrm";
  230. regulator-min-microvolt = <1200000>;
  231. regulator-max-microvolt = <1400000>;
  232. regulator-ramp-delay = <12500>;
  233. regulator-always-on;
  234. };
  235. mt6397_vio18_reg: buck_vio18 {
  236. regulator-compatible = "buck_vio18";
  237. regulator-name = "vio18";
  238. regulator-min-microvolt = <1620000>;
  239. regulator-max-microvolt = <1980000>;
  240. regulator-ramp-delay = <12500>;
  241. regulator-always-on;
  242. };
  243. mt6397_vtcxo_reg: ldo_vtcxo {
  244. regulator-compatible = "ldo_vtcxo";
  245. regulator-name = "vtcxo";
  246. regulator-always-on;
  247. };
  248. mt6397_va28_reg: ldo_va28 {
  249. regulator-compatible = "ldo_va28";
  250. regulator-name = "va28";
  251. regulator-always-on;
  252. };
  253. mt6397_vcama_reg: ldo_vcama {
  254. regulator-compatible = "ldo_vcama";
  255. regulator-name = "vcama";
  256. regulator-min-microvolt = <1500000>;
  257. regulator-max-microvolt = <2800000>;
  258. regulator-enable-ramp-delay = <218>;
  259. };
  260. mt6397_vio28_reg: ldo_vio28 {
  261. regulator-compatible = "ldo_vio28";
  262. regulator-name = "vio28";
  263. regulator-always-on;
  264. };
  265. mt6397_vusb_reg: ldo_vusb {
  266. regulator-compatible = "ldo_vusb";
  267. regulator-name = "vusb";
  268. };
  269. mt6397_vmc_reg: ldo_vmc {
  270. regulator-compatible = "ldo_vmc";
  271. regulator-name = "vmc";
  272. regulator-min-microvolt = <1800000>;
  273. regulator-max-microvolt = <3300000>;
  274. regulator-enable-ramp-delay = <218>;
  275. };
  276. mt6397_vmch_reg: ldo_vmch {
  277. regulator-compatible = "ldo_vmch";
  278. regulator-name = "vmch";
  279. regulator-min-microvolt = <3000000>;
  280. regulator-max-microvolt = <3300000>;
  281. regulator-enable-ramp-delay = <218>;
  282. };
  283. mt6397_vemc_3v3_reg: ldo_vemc3v3 {
  284. regulator-compatible = "ldo_vemc3v3";
  285. regulator-name = "vemc_3v3";
  286. regulator-min-microvolt = <3000000>;
  287. regulator-max-microvolt = <3300000>;
  288. regulator-enable-ramp-delay = <218>;
  289. };
  290. mt6397_vgp1_reg: ldo_vgp1 {
  291. regulator-compatible = "ldo_vgp1";
  292. regulator-name = "vcamd";
  293. regulator-min-microvolt = <1220000>;
  294. regulator-max-microvolt = <3300000>;
  295. regulator-enable-ramp-delay = <240>;
  296. };
  297. mt6397_vgp2_reg: ldo_vgp2 {
  298. regulator-compatible = "ldo_vgp2";
  299. regulator-name = "vcamio";
  300. regulator-min-microvolt = <1000000>;
  301. regulator-max-microvolt = <3300000>;
  302. regulator-enable-ramp-delay = <218>;
  303. };
  304. mt6397_vgp3_reg: ldo_vgp3 {
  305. regulator-compatible = "ldo_vgp3";
  306. regulator-name = "vcamaf";
  307. regulator-min-microvolt = <1200000>;
  308. regulator-max-microvolt = <3300000>;
  309. regulator-enable-ramp-delay = <218>;
  310. };
  311. mt6397_vgp4_reg: ldo_vgp4 {
  312. regulator-compatible = "ldo_vgp4";
  313. regulator-name = "vgp4";
  314. regulator-min-microvolt = <1200000>;
  315. regulator-max-microvolt = <3300000>;
  316. regulator-enable-ramp-delay = <218>;
  317. };
  318. mt6397_vgp5_reg: ldo_vgp5 {
  319. regulator-compatible = "ldo_vgp5";
  320. regulator-name = "vgp5";
  321. regulator-min-microvolt = <1200000>;
  322. regulator-max-microvolt = <3000000>;
  323. regulator-enable-ramp-delay = <218>;
  324. };
  325. mt6397_vgp6_reg: ldo_vgp6 {
  326. regulator-compatible = "ldo_vgp6";
  327. regulator-name = "vgp6";
  328. regulator-min-microvolt = <1200000>;
  329. regulator-max-microvolt = <3300000>;
  330. regulator-enable-ramp-delay = <218>;
  331. };
  332. mt6397_vibr_reg: ldo_vibr {
  333. regulator-compatible = "ldo_vibr";
  334. regulator-name = "vibr";
  335. regulator-min-microvolt = <1300000>;
  336. regulator-max-microvolt = <3300000>;
  337. regulator-enable-ramp-delay = <218>;
  338. };
  339. };
  340. };
  341. };
  342. &pio {
  343. spi_pins_a: spi0 {
  344. pins_spi {
  345. pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
  346. <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
  347. <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
  348. <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
  349. };
  350. };
  351. };
  352. &spi {
  353. pinctrl-names = "default";
  354. pinctrl-0 = <&spi_pins_a>;
  355. mediatek,pad-select = <0>;
  356. status = "okay";
  357. };
  358. &uart0 {
  359. status = "okay";
  360. };