debug-monitors.h 3.8 KB

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  1. /*
  2. * Copyright (C) 2012 ARM Ltd.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #ifndef __ASM_DEBUG_MONITORS_H
  17. #define __ASM_DEBUG_MONITORS_H
  18. #ifdef __KERNEL__
  19. #include <linux/errno.h>
  20. #include <linux/types.h>
  21. #include <asm/esr.h>
  22. #include <asm/insn.h>
  23. #include <asm/ptrace.h>
  24. /* Low-level stepping controls. */
  25. #define DBG_MDSCR_SS (1 << 0)
  26. #define DBG_SPSR_SS (1 << 21)
  27. /* MDSCR_EL1 enabling bits */
  28. #define DBG_MDSCR_KDE (1 << 13)
  29. #define DBG_MDSCR_MDE (1 << 15)
  30. #define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
  31. #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7)
  32. /* AArch64 */
  33. #define DBG_ESR_EVT_HWBP 0x0
  34. #define DBG_ESR_EVT_HWSS 0x1
  35. #define DBG_ESR_EVT_HWWP 0x2
  36. #define DBG_ESR_EVT_BRK 0x6
  37. /*
  38. * Break point instruction encoding
  39. */
  40. #define BREAK_INSTR_SIZE AARCH64_INSN_SIZE
  41. /*
  42. * #imm16 values used for BRK instruction generation
  43. * Allowed values for kgbd are 0x400 - 0x7ff
  44. * 0x100: for triggering a fault on purpose (reserved)
  45. * 0x400: for dynamic BRK instruction
  46. * 0x401: for compile time BRK instruction
  47. * 0x800: kernel-mode BUG() and WARN() traps
  48. */
  49. #define FAULT_BRK_IMM 0x100
  50. #define KGDB_DYN_DBG_BRK_IMM 0x400
  51. #define KGDB_COMPILED_DBG_BRK_IMM 0x401
  52. #define BUG_BRK_IMM 0x800
  53. /*
  54. * BRK instruction encoding
  55. * The #imm16 value should be placed at bits[20:5] within BRK ins
  56. */
  57. #define AARCH64_BREAK_MON 0xd4200000
  58. /*
  59. * BRK instruction for provoking a fault on purpose
  60. * Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
  61. */
  62. #define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
  63. #define AARCH64_BREAK_KGDB_DYN_DBG \
  64. (AARCH64_BREAK_MON | (KGDB_DYN_DBG_BRK_IMM << 5))
  65. #define KGDB_DYN_BRK_INS_BYTE(x) \
  66. ((AARCH64_BREAK_KGDB_DYN_DBG >> (8 * (x))) & 0xff)
  67. #define CACHE_FLUSH_IS_SAFE 1
  68. /* AArch32 */
  69. #define DBG_ESR_EVT_BKPT 0x4
  70. #define DBG_ESR_EVT_VECC 0x5
  71. #define AARCH32_BREAK_ARM 0x07f001f0
  72. #define AARCH32_BREAK_THUMB 0xde01
  73. #define AARCH32_BREAK_THUMB2_LO 0xf7f0
  74. #define AARCH32_BREAK_THUMB2_HI 0xa000
  75. #ifndef __ASSEMBLY__
  76. struct task_struct;
  77. #define DBG_ARCH_ID_RESERVED 0 /* In case of ptrace ABI updates. */
  78. #define DBG_HOOK_HANDLED 0
  79. #define DBG_HOOK_ERROR 1
  80. struct step_hook {
  81. struct list_head node;
  82. int (*fn)(struct pt_regs *regs, unsigned int esr);
  83. };
  84. void register_step_hook(struct step_hook *hook);
  85. void unregister_step_hook(struct step_hook *hook);
  86. struct break_hook {
  87. struct list_head node;
  88. u32 esr_val;
  89. u32 esr_mask;
  90. int (*fn)(struct pt_regs *regs, unsigned int esr);
  91. };
  92. void register_break_hook(struct break_hook *hook);
  93. void unregister_break_hook(struct break_hook *hook);
  94. u8 debug_monitors_arch(void);
  95. enum dbg_active_el {
  96. DBG_ACTIVE_EL0 = 0,
  97. DBG_ACTIVE_EL1,
  98. };
  99. void enable_debug_monitors(enum dbg_active_el el);
  100. void disable_debug_monitors(enum dbg_active_el el);
  101. void user_rewind_single_step(struct task_struct *task);
  102. void user_fastforward_single_step(struct task_struct *task);
  103. void kernel_enable_single_step(struct pt_regs *regs);
  104. void kernel_disable_single_step(void);
  105. int kernel_active_single_step(void);
  106. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  107. int reinstall_suspended_bps(struct pt_regs *regs);
  108. #else
  109. static inline int reinstall_suspended_bps(struct pt_regs *regs)
  110. {
  111. return -ENODEV;
  112. }
  113. #endif
  114. int aarch32_break_handler(struct pt_regs *regs);
  115. #endif /* __ASSEMBLY */
  116. #endif /* __KERNEL__ */
  117. #endif /* __ASM_DEBUG_MONITORS_H */