ptrace.h 4.7 KB

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  1. /*
  2. * Based on arch/arm/include/asm/ptrace.h
  3. *
  4. * Copyright (C) 1996-2003 Russell King
  5. * Copyright (C) 2012 ARM Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef __ASM_PTRACE_H
  20. #define __ASM_PTRACE_H
  21. #include <uapi/asm/ptrace.h>
  22. /* Current Exception Level values, as contained in CurrentEL */
  23. #define CurrentEL_EL1 (1 << 2)
  24. #define CurrentEL_EL2 (2 << 2)
  25. /* AArch32-specific ptrace requests */
  26. #define COMPAT_PTRACE_GETREGS 12
  27. #define COMPAT_PTRACE_SETREGS 13
  28. #define COMPAT_PTRACE_GET_THREAD_AREA 22
  29. #define COMPAT_PTRACE_SET_SYSCALL 23
  30. #define COMPAT_PTRACE_GETVFPREGS 27
  31. #define COMPAT_PTRACE_SETVFPREGS 28
  32. #define COMPAT_PTRACE_GETHBPREGS 29
  33. #define COMPAT_PTRACE_SETHBPREGS 30
  34. /* AArch32 CPSR bits */
  35. #define COMPAT_PSR_MODE_MASK 0x0000001f
  36. #define COMPAT_PSR_MODE_USR 0x00000010
  37. #define COMPAT_PSR_MODE_FIQ 0x00000011
  38. #define COMPAT_PSR_MODE_IRQ 0x00000012
  39. #define COMPAT_PSR_MODE_SVC 0x00000013
  40. #define COMPAT_PSR_MODE_ABT 0x00000017
  41. #define COMPAT_PSR_MODE_HYP 0x0000001a
  42. #define COMPAT_PSR_MODE_UND 0x0000001b
  43. #define COMPAT_PSR_MODE_SYS 0x0000001f
  44. #define COMPAT_PSR_T_BIT 0x00000020
  45. #define COMPAT_PSR_E_BIT 0x00000200
  46. #define COMPAT_PSR_F_BIT 0x00000040
  47. #define COMPAT_PSR_I_BIT 0x00000080
  48. #define COMPAT_PSR_A_BIT 0x00000100
  49. #define COMPAT_PSR_E_BIT 0x00000200
  50. #define COMPAT_PSR_J_BIT 0x01000000
  51. #define COMPAT_PSR_Q_BIT 0x08000000
  52. #define COMPAT_PSR_V_BIT 0x10000000
  53. #define COMPAT_PSR_C_BIT 0x20000000
  54. #define COMPAT_PSR_Z_BIT 0x40000000
  55. #define COMPAT_PSR_N_BIT 0x80000000
  56. #define COMPAT_PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
  57. #define COMPAT_PSR_GE_MASK 0x000f0000
  58. #ifdef CONFIG_CPU_BIG_ENDIAN
  59. #define COMPAT_PSR_ENDSTATE COMPAT_PSR_E_BIT
  60. #else
  61. #define COMPAT_PSR_ENDSTATE 0
  62. #endif
  63. /*
  64. * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
  65. * process is located in memory.
  66. */
  67. #define COMPAT_PT_TEXT_ADDR 0x10000
  68. #define COMPAT_PT_DATA_ADDR 0x10004
  69. #define COMPAT_PT_TEXT_END_ADDR 0x10008
  70. #ifndef __ASSEMBLY__
  71. /* sizeof(struct user) for AArch32 */
  72. #define COMPAT_USER_SZ 296
  73. /* Architecturally defined mapping between AArch32 and AArch64 registers */
  74. #define compat_usr(x) regs[(x)]
  75. #define compat_fp regs[11]
  76. #define compat_sp regs[13]
  77. #define compat_lr regs[14]
  78. #define compat_sp_hyp regs[15]
  79. #define compat_lr_irq regs[16]
  80. #define compat_sp_irq regs[17]
  81. #define compat_lr_svc regs[18]
  82. #define compat_sp_svc regs[19]
  83. #define compat_lr_abt regs[20]
  84. #define compat_sp_abt regs[21]
  85. #define compat_lr_und regs[22]
  86. #define compat_sp_und regs[23]
  87. #define compat_r8_fiq regs[24]
  88. #define compat_r9_fiq regs[25]
  89. #define compat_r10_fiq regs[26]
  90. #define compat_r11_fiq regs[27]
  91. #define compat_r12_fiq regs[28]
  92. #define compat_sp_fiq regs[29]
  93. #define compat_lr_fiq regs[30]
  94. /*
  95. * This struct defines the way the registers are stored on the stack during an
  96. * exception. Note that sizeof(struct pt_regs) has to be a multiple of 16 (for
  97. * stack alignment). struct user_pt_regs must form a prefix of struct pt_regs.
  98. */
  99. struct pt_regs {
  100. union {
  101. struct user_pt_regs user_regs;
  102. struct {
  103. u64 regs[31];
  104. u64 sp;
  105. u64 pc;
  106. u64 pstate;
  107. };
  108. };
  109. u64 orig_x0;
  110. u64 syscallno;
  111. u64 orig_addr_limit;
  112. u64 unused; // maintain 16 byte alignment
  113. };
  114. #define arch_has_single_step() (1)
  115. #ifdef CONFIG_COMPAT
  116. #define compat_thumb_mode(regs) \
  117. (((regs)->pstate & COMPAT_PSR_T_BIT))
  118. #else
  119. #define compat_thumb_mode(regs) (0)
  120. #endif
  121. #define user_mode(regs) \
  122. (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t)
  123. #define compat_user_mode(regs) \
  124. (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \
  125. (PSR_MODE32_BIT | PSR_MODE_EL0t))
  126. #define processor_mode(regs) \
  127. ((regs)->pstate & PSR_MODE_MASK)
  128. #define interrupts_enabled(regs) \
  129. (!((regs)->pstate & PSR_I_BIT))
  130. #define fast_interrupts_enabled(regs) \
  131. (!((regs)->pstate & PSR_F_BIT))
  132. #define user_stack_pointer(regs) \
  133. (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
  134. static inline unsigned long regs_return_value(struct pt_regs *regs)
  135. {
  136. return regs->regs[0];
  137. }
  138. /* We must avoid circular header include via sched.h */
  139. struct task_struct;
  140. int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task);
  141. #define instruction_pointer(regs) ((unsigned long)(regs)->pc)
  142. extern unsigned long profile_pc(struct pt_regs *regs);
  143. #endif /* __ASSEMBLY__ */
  144. #endif