asm-offsets.c 8.3 KB

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  1. /*
  2. * Based on arch/arm/kernel/asm-offsets.c
  3. *
  4. * Copyright (C) 1995-2003 Russell King
  5. * 2001-2002 Keith Owens
  6. * Copyright (C) 2012 ARM Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include <linux/sched.h>
  21. #include <linux/mm.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/kvm_host.h>
  24. #include <asm/thread_info.h>
  25. #include <asm/memory.h>
  26. #include <asm/smp_plat.h>
  27. #include <asm/suspend.h>
  28. #include <asm/vdso_datapage.h>
  29. #include <linux/kbuild.h>
  30. int main(void)
  31. {
  32. DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
  33. BLANK();
  34. DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
  35. DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
  36. DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
  37. DEFINE(TI_TASK, offsetof(struct thread_info, task));
  38. DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
  39. BLANK();
  40. DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
  41. BLANK();
  42. DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
  43. DEFINE(S_X1, offsetof(struct pt_regs, regs[1]));
  44. DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
  45. DEFINE(S_X3, offsetof(struct pt_regs, regs[3]));
  46. DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
  47. DEFINE(S_X5, offsetof(struct pt_regs, regs[5]));
  48. DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
  49. DEFINE(S_X7, offsetof(struct pt_regs, regs[7]));
  50. DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
  51. DEFINE(S_SP, offsetof(struct pt_regs, sp));
  52. #ifdef CONFIG_COMPAT
  53. DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp));
  54. #endif
  55. DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
  56. DEFINE(S_PC, offsetof(struct pt_regs, pc));
  57. DEFINE(S_ORIG_X0, offsetof(struct pt_regs, orig_x0));
  58. DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
  59. DEFINE(S_ORIG_ADDR_LIMIT, offsetof(struct pt_regs, orig_addr_limit));
  60. DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
  61. BLANK();
  62. DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
  63. BLANK();
  64. DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
  65. DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
  66. BLANK();
  67. DEFINE(VM_EXEC, VM_EXEC);
  68. BLANK();
  69. DEFINE(PAGE_SZ, PAGE_SIZE);
  70. BLANK();
  71. DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
  72. DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
  73. DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
  74. BLANK();
  75. DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
  76. DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
  77. DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
  78. DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
  79. DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE);
  80. DEFINE(CLOCK_COARSE_RES, LOW_RES_NSEC);
  81. DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
  82. BLANK();
  83. DEFINE(VDSO_CS_CYCLE_LAST, offsetof(struct vdso_data, cs_cycle_last));
  84. DEFINE(VDSO_XTIME_CLK_SEC, offsetof(struct vdso_data, xtime_clock_sec));
  85. DEFINE(VDSO_XTIME_CLK_NSEC, offsetof(struct vdso_data, xtime_clock_nsec));
  86. DEFINE(VDSO_XTIME_CRS_SEC, offsetof(struct vdso_data, xtime_coarse_sec));
  87. DEFINE(VDSO_XTIME_CRS_NSEC, offsetof(struct vdso_data, xtime_coarse_nsec));
  88. DEFINE(VDSO_WTM_CLK_SEC, offsetof(struct vdso_data, wtm_clock_sec));
  89. DEFINE(VDSO_WTM_CLK_NSEC, offsetof(struct vdso_data, wtm_clock_nsec));
  90. DEFINE(VDSO_TB_SEQ_COUNT, offsetof(struct vdso_data, tb_seq_count));
  91. DEFINE(VDSO_CS_MULT, offsetof(struct vdso_data, cs_mult));
  92. DEFINE(VDSO_CS_SHIFT, offsetof(struct vdso_data, cs_shift));
  93. DEFINE(VDSO_TZ_MINWEST, offsetof(struct vdso_data, tz_minuteswest));
  94. DEFINE(VDSO_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
  95. DEFINE(VDSO_USE_SYSCALL, offsetof(struct vdso_data, use_syscall));
  96. BLANK();
  97. DEFINE(TVAL_TV_SEC, offsetof(struct timeval, tv_sec));
  98. DEFINE(TVAL_TV_USEC, offsetof(struct timeval, tv_usec));
  99. DEFINE(TSPEC_TV_SEC, offsetof(struct timespec, tv_sec));
  100. DEFINE(TSPEC_TV_NSEC, offsetof(struct timespec, tv_nsec));
  101. BLANK();
  102. DEFINE(TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
  103. DEFINE(TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
  104. BLANK();
  105. #ifdef CONFIG_KVM_ARM_HOST
  106. DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt));
  107. DEFINE(CPU_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
  108. DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_regs, regs));
  109. DEFINE(CPU_FP_REGS, offsetof(struct kvm_regs, fp_regs));
  110. DEFINE(CPU_SP_EL1, offsetof(struct kvm_regs, sp_el1));
  111. DEFINE(CPU_ELR_EL1, offsetof(struct kvm_regs, elr_el1));
  112. DEFINE(CPU_SPSR, offsetof(struct kvm_regs, spsr));
  113. DEFINE(CPU_SYSREGS, offsetof(struct kvm_cpu_context, sys_regs));
  114. DEFINE(VCPU_ESR_EL2, offsetof(struct kvm_vcpu, arch.fault.esr_el2));
  115. DEFINE(VCPU_FAR_EL2, offsetof(struct kvm_vcpu, arch.fault.far_el2));
  116. DEFINE(VCPU_HPFAR_EL2, offsetof(struct kvm_vcpu, arch.fault.hpfar_el2));
  117. DEFINE(VCPU_DEBUG_FLAGS, offsetof(struct kvm_vcpu, arch.debug_flags));
  118. DEFINE(VCPU_DEBUG_PTR, offsetof(struct kvm_vcpu, arch.debug_ptr));
  119. DEFINE(DEBUG_BCR, offsetof(struct kvm_guest_debug_arch, dbg_bcr));
  120. DEFINE(DEBUG_BVR, offsetof(struct kvm_guest_debug_arch, dbg_bvr));
  121. DEFINE(DEBUG_WCR, offsetof(struct kvm_guest_debug_arch, dbg_wcr));
  122. DEFINE(DEBUG_WVR, offsetof(struct kvm_guest_debug_arch, dbg_wvr));
  123. DEFINE(VCPU_HCR_EL2, offsetof(struct kvm_vcpu, arch.hcr_el2));
  124. DEFINE(VCPU_MDCR_EL2, offsetof(struct kvm_vcpu, arch.mdcr_el2));
  125. DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines));
  126. DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
  127. DEFINE(VCPU_HOST_DEBUG_STATE, offsetof(struct kvm_vcpu, arch.host_debug_state));
  128. DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
  129. DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
  130. DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff));
  131. DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled));
  132. DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
  133. DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
  134. DEFINE(VGIC_V2_CPU_HCR, offsetof(struct vgic_cpu, vgic_v2.vgic_hcr));
  135. DEFINE(VGIC_V2_CPU_VMCR, offsetof(struct vgic_cpu, vgic_v2.vgic_vmcr));
  136. DEFINE(VGIC_V2_CPU_MISR, offsetof(struct vgic_cpu, vgic_v2.vgic_misr));
  137. DEFINE(VGIC_V2_CPU_EISR, offsetof(struct vgic_cpu, vgic_v2.vgic_eisr));
  138. DEFINE(VGIC_V2_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_v2.vgic_elrsr));
  139. DEFINE(VGIC_V2_CPU_APR, offsetof(struct vgic_cpu, vgic_v2.vgic_apr));
  140. DEFINE(VGIC_V2_CPU_LR, offsetof(struct vgic_cpu, vgic_v2.vgic_lr));
  141. DEFINE(VGIC_V3_CPU_SRE, offsetof(struct vgic_cpu, vgic_v3.vgic_sre));
  142. DEFINE(VGIC_V3_CPU_HCR, offsetof(struct vgic_cpu, vgic_v3.vgic_hcr));
  143. DEFINE(VGIC_V3_CPU_VMCR, offsetof(struct vgic_cpu, vgic_v3.vgic_vmcr));
  144. DEFINE(VGIC_V3_CPU_MISR, offsetof(struct vgic_cpu, vgic_v3.vgic_misr));
  145. DEFINE(VGIC_V3_CPU_EISR, offsetof(struct vgic_cpu, vgic_v3.vgic_eisr));
  146. DEFINE(VGIC_V3_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_v3.vgic_elrsr));
  147. DEFINE(VGIC_V3_CPU_AP0R, offsetof(struct vgic_cpu, vgic_v3.vgic_ap0r));
  148. DEFINE(VGIC_V3_CPU_AP1R, offsetof(struct vgic_cpu, vgic_v3.vgic_ap1r));
  149. DEFINE(VGIC_V3_CPU_LR, offsetof(struct vgic_cpu, vgic_v3.vgic_lr));
  150. DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr));
  151. DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr));
  152. DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base));
  153. #endif
  154. #ifdef CONFIG_CPU_PM
  155. DEFINE(CPU_SUSPEND_SZ, sizeof(struct cpu_suspend_ctx));
  156. DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp));
  157. DEFINE(MPIDR_HASH_MASK, offsetof(struct mpidr_hash, mask));
  158. DEFINE(MPIDR_HASH_SHIFTS, offsetof(struct mpidr_hash, shift_aff));
  159. DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
  160. DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
  161. DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
  162. #endif
  163. return 0;
  164. }