setup.c 10 KB

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  1. /*
  2. * Based on arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. * Copyright (C) 2012 ARM Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/acpi.h>
  20. #include <linux/export.h>
  21. #include <linux/kernel.h>
  22. #include <linux/stddef.h>
  23. #include <linux/ioport.h>
  24. #include <linux/delay.h>
  25. #include <linux/utsname.h>
  26. #include <linux/initrd.h>
  27. #include <linux/console.h>
  28. #include <linux/cache.h>
  29. #include <linux/bootmem.h>
  30. #include <linux/screen_info.h>
  31. #include <linux/init.h>
  32. #include <linux/kexec.h>
  33. #include <linux/crash_dump.h>
  34. #include <linux/root_dev.h>
  35. #include <linux/cpu.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/smp.h>
  38. #include <linux/fs.h>
  39. #include <linux/proc_fs.h>
  40. #include <linux/memblock.h>
  41. #include <linux/of_iommu.h>
  42. #include <linux/of_fdt.h>
  43. #include <linux/of_platform.h>
  44. #include <linux/efi.h>
  45. #include <linux/psci.h>
  46. #include <asm/acpi.h>
  47. #include <asm/fixmap.h>
  48. #include <asm/cpu.h>
  49. #include <asm/cputype.h>
  50. #include <asm/elf.h>
  51. #include <asm/cpufeature.h>
  52. #include <asm/cpu_ops.h>
  53. #include <asm/kasan.h>
  54. #include <asm/sections.h>
  55. #include <asm/setup.h>
  56. #include <asm/smp_plat.h>
  57. #include <asm/cacheflush.h>
  58. #include <asm/tlbflush.h>
  59. #include <asm/traps.h>
  60. #include <asm/memblock.h>
  61. #include <asm/efi.h>
  62. #include <asm/xen/hypervisor.h>
  63. phys_addr_t __fdt_pointer __initdata;
  64. /*
  65. * Standard memory resources
  66. */
  67. static struct resource mem_res[] = {
  68. {
  69. .name = "Kernel code",
  70. .start = 0,
  71. .end = 0,
  72. .flags = IORESOURCE_MEM
  73. },
  74. {
  75. .name = "Kernel data",
  76. .start = 0,
  77. .end = 0,
  78. .flags = IORESOURCE_MEM
  79. }
  80. };
  81. #define kernel_code mem_res[0]
  82. #define kernel_data mem_res[1]
  83. /*
  84. * The recorded values of x0 .. x3 upon kernel entry.
  85. */
  86. u64 __cacheline_aligned boot_args[4];
  87. void __init smp_setup_processor_id(void)
  88. {
  89. u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
  90. cpu_logical_map(0) = mpidr;
  91. /*
  92. * clear __my_cpu_offset on boot CPU to avoid hang caused by
  93. * using percpu variable early, for example, lockdep will
  94. * access percpu variable inside lock_release
  95. */
  96. set_my_cpu_offset(0);
  97. pr_info("Booting Linux on physical CPU 0x%lx\n", (unsigned long)mpidr);
  98. }
  99. bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
  100. {
  101. return phys_id == cpu_logical_map(cpu);
  102. }
  103. struct mpidr_hash mpidr_hash;
  104. /**
  105. * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
  106. * level in order to build a linear index from an
  107. * MPIDR value. Resulting algorithm is a collision
  108. * free hash carried out through shifting and ORing
  109. */
  110. static void __init smp_build_mpidr_hash(void)
  111. {
  112. u32 i, affinity, fs[4], bits[4], ls;
  113. u64 mask = 0;
  114. /*
  115. * Pre-scan the list of MPIDRS and filter out bits that do
  116. * not contribute to affinity levels, ie they never toggle.
  117. */
  118. for_each_possible_cpu(i)
  119. mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
  120. pr_debug("mask of set bits %#llx\n", mask);
  121. /*
  122. * Find and stash the last and first bit set at all affinity levels to
  123. * check how many bits are required to represent them.
  124. */
  125. for (i = 0; i < 4; i++) {
  126. affinity = MPIDR_AFFINITY_LEVEL(mask, i);
  127. /*
  128. * Find the MSB bit and LSB bits position
  129. * to determine how many bits are required
  130. * to express the affinity level.
  131. */
  132. ls = fls(affinity);
  133. fs[i] = affinity ? ffs(affinity) - 1 : 0;
  134. bits[i] = ls - fs[i];
  135. }
  136. /*
  137. * An index can be created from the MPIDR_EL1 by isolating the
  138. * significant bits at each affinity level and by shifting
  139. * them in order to compress the 32 bits values space to a
  140. * compressed set of values. This is equivalent to hashing
  141. * the MPIDR_EL1 through shifting and ORing. It is a collision free
  142. * hash though not minimal since some levels might contain a number
  143. * of CPUs that is not an exact power of 2 and their bit
  144. * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
  145. */
  146. mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
  147. mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
  148. mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
  149. (bits[1] + bits[0]);
  150. mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
  151. fs[3] - (bits[2] + bits[1] + bits[0]);
  152. mpidr_hash.mask = mask;
  153. mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
  154. pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
  155. mpidr_hash.shift_aff[0],
  156. mpidr_hash.shift_aff[1],
  157. mpidr_hash.shift_aff[2],
  158. mpidr_hash.shift_aff[3],
  159. mpidr_hash.mask,
  160. mpidr_hash.bits);
  161. /*
  162. * 4x is an arbitrary value used to warn on a hash table much bigger
  163. * than expected on most systems.
  164. */
  165. if (mpidr_hash_size() > 4 * num_possible_cpus())
  166. pr_warn("Large number of MPIDR hash buckets detected\n");
  167. __flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
  168. }
  169. static void __init setup_machine_fdt(phys_addr_t dt_phys)
  170. {
  171. void *dt_virt = fixmap_remap_fdt(dt_phys);
  172. if (!dt_virt || !early_init_dt_scan(dt_virt)) {
  173. pr_crit("\n"
  174. "Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n"
  175. "The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
  176. "\nPlease check your bootloader.",
  177. &dt_phys, dt_virt);
  178. while (true)
  179. cpu_relax();
  180. }
  181. dump_stack_set_arch_desc("%s (DT)", of_flat_dt_get_machine_name());
  182. }
  183. static void __init request_standard_resources(void)
  184. {
  185. struct memblock_region *region;
  186. struct resource *res;
  187. kernel_code.start = virt_to_phys(_text);
  188. kernel_code.end = virt_to_phys(_etext - 1);
  189. kernel_data.start = virt_to_phys(_sdata);
  190. kernel_data.end = virt_to_phys(_end - 1);
  191. for_each_memblock(memory, region) {
  192. res = alloc_bootmem_low(sizeof(*res));
  193. res->name = "System RAM";
  194. res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
  195. res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
  196. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  197. request_resource(&iomem_resource, res);
  198. if (kernel_code.start >= res->start &&
  199. kernel_code.end <= res->end)
  200. request_resource(res, &kernel_code);
  201. if (kernel_data.start >= res->start &&
  202. kernel_data.end <= res->end)
  203. request_resource(res, &kernel_data);
  204. }
  205. }
  206. #ifdef CONFIG_BLK_DEV_INITRD
  207. /*
  208. * Relocate initrd if it is not completely within the linear mapping.
  209. * This would be the case if mem= cuts out all or part of it.
  210. */
  211. static void __init relocate_initrd(void)
  212. {
  213. phys_addr_t orig_start = __virt_to_phys(initrd_start);
  214. phys_addr_t orig_end = __virt_to_phys(initrd_end);
  215. phys_addr_t ram_end = memblock_end_of_DRAM();
  216. phys_addr_t new_start;
  217. unsigned long size, to_free = 0;
  218. void *dest;
  219. if (orig_end <= ram_end)
  220. return;
  221. /*
  222. * Any of the original initrd which overlaps the linear map should
  223. * be freed after relocating.
  224. */
  225. if (orig_start < ram_end)
  226. to_free = ram_end - orig_start;
  227. size = orig_end - orig_start;
  228. if (!size)
  229. return;
  230. /* initrd needs to be relocated completely inside linear mapping */
  231. new_start = memblock_find_in_range(0, PFN_PHYS(max_pfn),
  232. size, PAGE_SIZE);
  233. if (!new_start)
  234. panic("Cannot relocate initrd of size %ld\n", size);
  235. memblock_reserve(new_start, size);
  236. initrd_start = __phys_to_virt(new_start);
  237. initrd_end = initrd_start + size;
  238. pr_info("Moving initrd from [%llx-%llx] to [%llx-%llx]\n",
  239. orig_start, orig_start + size - 1,
  240. new_start, new_start + size - 1);
  241. dest = (void *)initrd_start;
  242. if (to_free) {
  243. memcpy(dest, (void *)__phys_to_virt(orig_start), to_free);
  244. dest += to_free;
  245. }
  246. copy_from_early_mem(dest, orig_start + to_free, size - to_free);
  247. if (to_free) {
  248. pr_info("Freeing original RAMDISK from [%llx-%llx]\n",
  249. orig_start, orig_start + to_free - 1);
  250. memblock_free(orig_start, to_free);
  251. }
  252. }
  253. #else
  254. static inline void __init relocate_initrd(void)
  255. {
  256. }
  257. #endif
  258. u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
  259. void __init setup_arch(char **cmdline_p)
  260. {
  261. pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id());
  262. sprintf(init_utsname()->machine, ELF_PLATFORM);
  263. init_mm.start_code = (unsigned long) _text;
  264. init_mm.end_code = (unsigned long) _etext;
  265. init_mm.end_data = (unsigned long) _edata;
  266. init_mm.brk = (unsigned long) _end;
  267. *cmdline_p = boot_command_line;
  268. early_fixmap_init();
  269. early_ioremap_init();
  270. setup_machine_fdt(__fdt_pointer);
  271. parse_early_param();
  272. /*
  273. * Unmask asynchronous aborts after bringing up possible earlycon.
  274. * (Report possible System Errors once we can report this occurred)
  275. */
  276. local_async_enable();
  277. efi_init();
  278. arm64_memblock_init();
  279. /* Parse the ACPI tables for possible boot-time configuration */
  280. acpi_boot_table_init();
  281. paging_init();
  282. relocate_initrd();
  283. kasan_init();
  284. request_standard_resources();
  285. early_ioremap_reset();
  286. if (acpi_disabled) {
  287. unflatten_device_tree();
  288. psci_dt_init();
  289. } else {
  290. psci_acpi_init();
  291. }
  292. xen_early_init();
  293. cpu_read_bootcpu_ops();
  294. smp_init_cpus();
  295. smp_build_mpidr_hash();
  296. #ifdef CONFIG_VT
  297. #if defined(CONFIG_VGA_CONSOLE)
  298. conswitchp = &vga_con;
  299. #elif defined(CONFIG_DUMMY_CONSOLE)
  300. conswitchp = &dummy_con;
  301. #endif
  302. #endif
  303. if (boot_args[1] || boot_args[2] || boot_args[3]) {
  304. pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
  305. "\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
  306. "This indicates a broken bootloader or old kernel\n",
  307. boot_args[1], boot_args[2], boot_args[3]);
  308. }
  309. }
  310. static int __init arm64_device_init(void)
  311. {
  312. if (of_have_populated_dt()) {
  313. of_iommu_init();
  314. of_platform_populate(NULL, of_default_bus_match_table,
  315. NULL, NULL);
  316. } else if (acpi_disabled) {
  317. pr_crit("Device tree not populated\n");
  318. }
  319. return 0;
  320. }
  321. arch_initcall_sync(arm64_device_init);
  322. static int __init topology_init(void)
  323. {
  324. int i;
  325. for_each_possible_cpu(i) {
  326. struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
  327. cpu->hotpluggable = 1;
  328. register_cpu(cpu, i);
  329. }
  330. return 0;
  331. }
  332. subsys_initcall(topology_init);