vmlinux.lds.S 4.7 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. *
  4. * Licensed under the GPL-2 or later
  5. */
  6. #include <asm-generic/vmlinux.lds.h>
  7. #include <asm/mem_map.h>
  8. #include <asm/page.h>
  9. #include <asm/thread_info.h>
  10. OUTPUT_FORMAT("elf32-bfin")
  11. ENTRY(__start)
  12. _jiffies = _jiffies_64;
  13. SECTIONS
  14. {
  15. #ifdef CONFIG_RAMKERNEL
  16. . = CONFIG_BOOT_LOAD;
  17. #else
  18. . = CONFIG_ROM_BASE;
  19. #endif
  20. /* Neither the text, ro_data or bss section need to be aligned
  21. * So pack them back to back
  22. */
  23. .text :
  24. {
  25. __text = .;
  26. _text = .;
  27. __stext = .;
  28. TEXT_TEXT
  29. #ifndef CONFIG_SCHEDULE_L1
  30. SCHED_TEXT
  31. #endif
  32. LOCK_TEXT
  33. IRQENTRY_TEXT
  34. KPROBES_TEXT
  35. #ifdef CONFIG_ROMKERNEL
  36. __sinittext = .;
  37. INIT_TEXT
  38. __einittext = .;
  39. EXIT_TEXT
  40. #endif
  41. *(.text.*)
  42. *(.fixup)
  43. #if !L1_CODE_LENGTH
  44. *(.l1.text)
  45. #endif
  46. __etext = .;
  47. }
  48. EXCEPTION_TABLE(4)
  49. NOTES
  50. /* Just in case the first read only is a 32-bit access */
  51. RO_DATA(4)
  52. __rodata_end = .;
  53. #ifdef CONFIG_ROMKERNEL
  54. . = CONFIG_BOOT_LOAD;
  55. .bss : AT(__rodata_end)
  56. #else
  57. .bss :
  58. #endif
  59. {
  60. . = ALIGN(4);
  61. ___bss_start = .;
  62. *(.bss .bss.*)
  63. *(COMMON)
  64. #if !L1_DATA_A_LENGTH
  65. *(.l1.bss)
  66. #endif
  67. #if !L1_DATA_B_LENGTH
  68. *(.l1.bss.B)
  69. #endif
  70. . = ALIGN(4);
  71. ___bss_stop = .;
  72. }
  73. #if defined(CONFIG_ROMKERNEL)
  74. .data : AT(LOADADDR(.bss) + SIZEOF(.bss))
  75. #else
  76. .data :
  77. #endif
  78. {
  79. __sdata = .;
  80. /* This gets done first, so the glob doesn't suck it in */
  81. CACHELINE_ALIGNED_DATA(32)
  82. #if !L1_DATA_A_LENGTH
  83. . = ALIGN(32);
  84. *(.data_l1.cacheline_aligned)
  85. *(.l1.data)
  86. #endif
  87. #if !L1_DATA_B_LENGTH
  88. *(.l1.data.B)
  89. #endif
  90. #if !L2_LENGTH
  91. . = ALIGN(32);
  92. *(.data_l2.cacheline_aligned)
  93. *(.l2.data)
  94. #endif
  95. DATA_DATA
  96. CONSTRUCTORS
  97. INIT_TASK_DATA(THREAD_SIZE)
  98. __edata = .;
  99. }
  100. __data_lma = LOADADDR(.data);
  101. __data_len = SIZEOF(.data);
  102. /* The init section should be last, so when we free it, it goes into
  103. * the general memory pool, and (hopefully) will decrease fragmentation
  104. * a tiny bit. The init section has a _requirement_ that it be
  105. * PAGE_SIZE aligned
  106. */
  107. . = ALIGN(PAGE_SIZE);
  108. ___init_begin = .;
  109. #ifdef CONFIG_RAMKERNEL
  110. INIT_TEXT_SECTION(PAGE_SIZE)
  111. /* We have to discard exit text and such at runtime, not link time, to
  112. * handle embedded cross-section references (alt instructions, bug
  113. * table, eh_frame, etc...). We need all of our .text up front and
  114. * .data after it for PCREL call issues.
  115. */
  116. .exit.text :
  117. {
  118. EXIT_TEXT
  119. }
  120. . = ALIGN(16);
  121. INIT_DATA_SECTION(16)
  122. PERCPU_SECTION(32)
  123. .exit.data :
  124. {
  125. EXIT_DATA
  126. }
  127. .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data))
  128. #else
  129. .init.data : AT(__data_lma + __data_len + 32)
  130. {
  131. __sinitdata = .;
  132. INIT_DATA
  133. INIT_SETUP(16)
  134. INIT_CALLS
  135. CON_INITCALL
  136. SECURITY_INITCALL
  137. INIT_RAM_FS
  138. . = ALIGN(PAGE_SIZE);
  139. ___per_cpu_load = .;
  140. PERCPU_INPUT(32)
  141. EXIT_DATA
  142. __einitdata = .;
  143. }
  144. __init_data_lma = LOADADDR(.init.data);
  145. __init_data_len = SIZEOF(.init.data);
  146. __init_data_end = .;
  147. .text_l1 L1_CODE_START : AT(__init_data_lma + __init_data_len)
  148. #endif
  149. {
  150. . = ALIGN(4);
  151. __stext_l1 = .;
  152. *(.l1.text.head)
  153. *(.l1.text)
  154. #ifdef CONFIG_SCHEDULE_L1
  155. SCHED_TEXT
  156. #endif
  157. . = ALIGN(4);
  158. __etext_l1 = .;
  159. }
  160. __text_l1_lma = LOADADDR(.text_l1);
  161. __text_l1_len = SIZEOF(.text_l1);
  162. ASSERT (__text_l1_len <= L1_CODE_LENGTH, "L1 text overflow!")
  163. .data_l1 L1_DATA_A_START : AT(__text_l1_lma + __text_l1_len)
  164. {
  165. . = ALIGN(4);
  166. __sdata_l1 = .;
  167. *(.l1.data)
  168. __edata_l1 = .;
  169. . = ALIGN(32);
  170. *(.data_l1.cacheline_aligned)
  171. . = ALIGN(4);
  172. __sbss_l1 = .;
  173. *(.l1.bss)
  174. . = ALIGN(4);
  175. __ebss_l1 = .;
  176. }
  177. __data_l1_lma = LOADADDR(.data_l1);
  178. __data_l1_len = SIZEOF(.data_l1);
  179. ASSERT (__data_l1_len <= L1_DATA_A_LENGTH, "L1 data A overflow!")
  180. .data_b_l1 L1_DATA_B_START : AT(__data_l1_lma + __data_l1_len)
  181. {
  182. . = ALIGN(4);
  183. __sdata_b_l1 = .;
  184. *(.l1.data.B)
  185. __edata_b_l1 = .;
  186. . = ALIGN(4);
  187. __sbss_b_l1 = .;
  188. *(.l1.bss.B)
  189. . = ALIGN(4);
  190. __ebss_b_l1 = .;
  191. }
  192. __data_b_l1_lma = LOADADDR(.data_b_l1);
  193. __data_b_l1_len = SIZEOF(.data_b_l1);
  194. ASSERT (__data_b_l1_len <= L1_DATA_B_LENGTH, "L1 data B overflow!")
  195. .text_data_l2 L2_START : AT(__data_b_l1_lma + __data_b_l1_len)
  196. {
  197. . = ALIGN(4);
  198. __stext_l2 = .;
  199. *(.l2.text)
  200. . = ALIGN(4);
  201. __etext_l2 = .;
  202. . = ALIGN(4);
  203. __sdata_l2 = .;
  204. *(.l2.data)
  205. __edata_l2 = .;
  206. . = ALIGN(32);
  207. *(.data_l2.cacheline_aligned)
  208. . = ALIGN(4);
  209. __sbss_l2 = .;
  210. *(.l2.bss)
  211. . = ALIGN(4);
  212. __ebss_l2 = .;
  213. }
  214. __l2_lma = LOADADDR(.text_data_l2);
  215. __l2_len = SIZEOF(.text_data_l2);
  216. ASSERT (__l2_len <= L2_LENGTH, "L2 overflow!")
  217. /* Force trailing alignment of our init section so that when we
  218. * free our init memory, we don't leave behind a partial page.
  219. */
  220. #ifdef CONFIG_RAMKERNEL
  221. . = __l2_lma + __l2_len;
  222. #else
  223. . = __init_data_end;
  224. #endif
  225. . = ALIGN(PAGE_SIZE);
  226. ___init_end = .;
  227. __end =.;
  228. STABS_DEBUG
  229. DWARF_DEBUG
  230. DISCARDS
  231. }