tcm-bf518.c 16 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <asm/dma.h>
  20. #include <asm/bfin5xx_spi.h>
  21. #include <asm/reboot.h>
  22. #include <asm/portmux.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/bfin_sdh.h>
  25. #include <linux/spi/ad7877.h>
  26. #include <net/dsa.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "Bluetechnix TCM-BF518";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  35. static struct mtd_partition tcm_partitions[] = {
  36. {
  37. .name = "bootloader(nor)",
  38. .size = 0x40000,
  39. .offset = 0,
  40. },
  41. {
  42. .name = "linux(nor)",
  43. .size = 0x1C0000,
  44. .offset = MTDPART_OFS_APPEND,
  45. }
  46. };
  47. static struct physmap_flash_data tcm_flash_data = {
  48. .width = 2,
  49. .parts = tcm_partitions,
  50. .nr_parts = ARRAY_SIZE(tcm_partitions),
  51. };
  52. static struct resource tcm_flash_resource = {
  53. .start = 0x20000000,
  54. .end = 0x201fffff,
  55. .flags = IORESOURCE_MEM,
  56. };
  57. static struct platform_device tcm_flash_device = {
  58. .name = "physmap-flash",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &tcm_flash_data,
  62. },
  63. .num_resources = 1,
  64. .resource = &tcm_flash_resource,
  65. };
  66. #endif
  67. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  68. static struct platform_device rtc_device = {
  69. .name = "rtc-bfin",
  70. .id = -1,
  71. };
  72. #endif
  73. #if IS_ENABLED(CONFIG_BFIN_MAC)
  74. #include <linux/bfin_mac.h>
  75. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  76. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  77. {
  78. .addr = 1,
  79. .irq = IRQ_MAC_PHYINT,
  80. },
  81. };
  82. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  83. .phydev_number = 1,
  84. .phydev_data = bfin_phydev_data,
  85. .phy_mode = PHY_INTERFACE_MODE_MII,
  86. .mac_peripherals = bfin_mac_peripherals,
  87. };
  88. static struct platform_device bfin_mii_bus = {
  89. .name = "bfin_mii_bus",
  90. .dev = {
  91. .platform_data = &bfin_mii_bus_data,
  92. }
  93. };
  94. static struct platform_device bfin_mac_device = {
  95. .name = "bfin_mac",
  96. .dev = {
  97. .platform_data = &bfin_mii_bus,
  98. }
  99. };
  100. #endif
  101. #if IS_ENABLED(CONFIG_MTD_M25P80)
  102. static struct mtd_partition bfin_spi_flash_partitions[] = {
  103. {
  104. .name = "bootloader(spi)",
  105. .size = 0x00040000,
  106. .offset = 0,
  107. .mask_flags = MTD_CAP_ROM
  108. }, {
  109. .name = "linux kernel(spi)",
  110. .size = MTDPART_SIZ_FULL,
  111. .offset = MTDPART_OFS_APPEND,
  112. }
  113. };
  114. static struct flash_platform_data bfin_spi_flash_data = {
  115. .name = "m25p80",
  116. .parts = bfin_spi_flash_partitions,
  117. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  118. .type = "m25p16",
  119. };
  120. /* SPI flash chip (m25p64) */
  121. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  122. .enable_dma = 0, /* use dma transfer with this chip*/
  123. };
  124. #endif
  125. #if IS_ENABLED(CONFIG_MMC_SPI)
  126. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  127. .enable_dma = 0,
  128. };
  129. #endif
  130. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  131. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  132. .model = 7877,
  133. .vref_delay_usecs = 50, /* internal, no capacitor */
  134. .x_plate_ohms = 419,
  135. .y_plate_ohms = 486,
  136. .pressure_max = 1000,
  137. .pressure_min = 0,
  138. .stopacq_polarity = 1,
  139. .first_conversion_delay = 3,
  140. .acquisition_time = 1,
  141. .averaging = 1,
  142. .pen_down_acc_interval = 1,
  143. };
  144. #endif
  145. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  146. #if IS_ENABLED(CONFIG_MTD_M25P80)
  147. {
  148. /* the modalias must be the same as spi device driver name */
  149. .modalias = "m25p80", /* Name of spi_driver for this device */
  150. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  151. .bus_num = 0, /* Framework bus number */
  152. .chip_select = 2, /* SPI0_SSEL2 */
  153. .platform_data = &bfin_spi_flash_data,
  154. .controller_data = &spi_flash_chip_info,
  155. .mode = SPI_MODE_3,
  156. },
  157. #endif
  158. #if IS_ENABLED(CONFIG_MMC_SPI)
  159. {
  160. .modalias = "mmc_spi",
  161. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  162. .bus_num = 0,
  163. .chip_select = 5,
  164. .controller_data = &mmc_spi_chip_info,
  165. .mode = SPI_MODE_3,
  166. },
  167. #endif
  168. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  169. {
  170. .modalias = "ad7877",
  171. .platform_data = &bfin_ad7877_ts_info,
  172. .irq = IRQ_PF8,
  173. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  174. .bus_num = 0,
  175. .chip_select = 2,
  176. },
  177. #endif
  178. #if IS_ENABLED(CONFIG_SND_SOC_WM8731) \
  179. && defined(CONFIG_SND_SOC_WM8731_SPI)
  180. {
  181. .modalias = "wm8731",
  182. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  183. .bus_num = 0,
  184. .chip_select = 5,
  185. .mode = SPI_MODE_0,
  186. },
  187. #endif
  188. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  189. {
  190. .modalias = "spidev",
  191. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  192. .bus_num = 0,
  193. .chip_select = 1,
  194. },
  195. #endif
  196. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  197. {
  198. .modalias = "bfin-lq035q1-spi",
  199. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  200. .bus_num = 0,
  201. .chip_select = 1,
  202. .mode = SPI_CPHA | SPI_CPOL,
  203. },
  204. #endif
  205. };
  206. /* SPI controller data */
  207. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  208. /* SPI (0) */
  209. static struct bfin5xx_spi_master bfin_spi0_info = {
  210. .num_chipselect = 6,
  211. .enable_dma = 1, /* master has the ability to do dma transfer */
  212. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  213. };
  214. static struct resource bfin_spi0_resource[] = {
  215. [0] = {
  216. .start = SPI0_REGBASE,
  217. .end = SPI0_REGBASE + 0xFF,
  218. .flags = IORESOURCE_MEM,
  219. },
  220. [1] = {
  221. .start = CH_SPI0,
  222. .end = CH_SPI0,
  223. .flags = IORESOURCE_DMA,
  224. },
  225. [2] = {
  226. .start = IRQ_SPI0,
  227. .end = IRQ_SPI0,
  228. .flags = IORESOURCE_IRQ,
  229. },
  230. };
  231. static struct platform_device bfin_spi0_device = {
  232. .name = "bfin-spi",
  233. .id = 0, /* Bus number */
  234. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  235. .resource = bfin_spi0_resource,
  236. .dev = {
  237. .platform_data = &bfin_spi0_info, /* Passed to driver */
  238. },
  239. };
  240. /* SPI (1) */
  241. static struct bfin5xx_spi_master bfin_spi1_info = {
  242. .num_chipselect = 6,
  243. .enable_dma = 1, /* master has the ability to do dma transfer */
  244. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  245. };
  246. static struct resource bfin_spi1_resource[] = {
  247. [0] = {
  248. .start = SPI1_REGBASE,
  249. .end = SPI1_REGBASE + 0xFF,
  250. .flags = IORESOURCE_MEM,
  251. },
  252. [1] = {
  253. .start = CH_SPI1,
  254. .end = CH_SPI1,
  255. .flags = IORESOURCE_DMA,
  256. },
  257. [2] = {
  258. .start = IRQ_SPI1,
  259. .end = IRQ_SPI1,
  260. .flags = IORESOURCE_IRQ,
  261. },
  262. };
  263. static struct platform_device bfin_spi1_device = {
  264. .name = "bfin-spi",
  265. .id = 1, /* Bus number */
  266. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  267. .resource = bfin_spi1_resource,
  268. .dev = {
  269. .platform_data = &bfin_spi1_info, /* Passed to driver */
  270. },
  271. };
  272. #endif /* spi master and devices */
  273. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  274. #ifdef CONFIG_SERIAL_BFIN_UART0
  275. static struct resource bfin_uart0_resources[] = {
  276. {
  277. .start = UART0_THR,
  278. .end = UART0_GCTL+2,
  279. .flags = IORESOURCE_MEM,
  280. },
  281. {
  282. .start = IRQ_UART0_TX,
  283. .end = IRQ_UART0_TX,
  284. .flags = IORESOURCE_IRQ,
  285. },
  286. {
  287. .start = IRQ_UART0_RX,
  288. .end = IRQ_UART0_RX,
  289. .flags = IORESOURCE_IRQ,
  290. },
  291. {
  292. .start = IRQ_UART0_ERROR,
  293. .end = IRQ_UART0_ERROR,
  294. .flags = IORESOURCE_IRQ,
  295. },
  296. {
  297. .start = CH_UART0_TX,
  298. .end = CH_UART0_TX,
  299. .flags = IORESOURCE_DMA,
  300. },
  301. {
  302. .start = CH_UART0_RX,
  303. .end = CH_UART0_RX,
  304. .flags = IORESOURCE_DMA,
  305. },
  306. };
  307. static unsigned short bfin_uart0_peripherals[] = {
  308. P_UART0_TX, P_UART0_RX, 0
  309. };
  310. static struct platform_device bfin_uart0_device = {
  311. .name = "bfin-uart",
  312. .id = 0,
  313. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  314. .resource = bfin_uart0_resources,
  315. .dev = {
  316. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  317. },
  318. };
  319. #endif
  320. #ifdef CONFIG_SERIAL_BFIN_UART1
  321. static struct resource bfin_uart1_resources[] = {
  322. {
  323. .start = UART1_THR,
  324. .end = UART1_GCTL+2,
  325. .flags = IORESOURCE_MEM,
  326. },
  327. {
  328. .start = IRQ_UART1_TX,
  329. .end = IRQ_UART1_TX,
  330. .flags = IORESOURCE_IRQ,
  331. },
  332. {
  333. .start = IRQ_UART1_RX,
  334. .end = IRQ_UART1_RX,
  335. .flags = IORESOURCE_IRQ,
  336. },
  337. {
  338. .start = IRQ_UART1_ERROR,
  339. .end = IRQ_UART1_ERROR,
  340. .flags = IORESOURCE_IRQ,
  341. },
  342. {
  343. .start = CH_UART1_TX,
  344. .end = CH_UART1_TX,
  345. .flags = IORESOURCE_DMA,
  346. },
  347. {
  348. .start = CH_UART1_RX,
  349. .end = CH_UART1_RX,
  350. .flags = IORESOURCE_DMA,
  351. },
  352. };
  353. static unsigned short bfin_uart1_peripherals[] = {
  354. P_UART1_TX, P_UART1_RX, 0
  355. };
  356. static struct platform_device bfin_uart1_device = {
  357. .name = "bfin-uart",
  358. .id = 1,
  359. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  360. .resource = bfin_uart1_resources,
  361. .dev = {
  362. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  363. },
  364. };
  365. #endif
  366. #endif
  367. #if IS_ENABLED(CONFIG_BFIN_SIR)
  368. #ifdef CONFIG_BFIN_SIR0
  369. static struct resource bfin_sir0_resources[] = {
  370. {
  371. .start = 0xFFC00400,
  372. .end = 0xFFC004FF,
  373. .flags = IORESOURCE_MEM,
  374. },
  375. {
  376. .start = IRQ_UART0_RX,
  377. .end = IRQ_UART0_RX+1,
  378. .flags = IORESOURCE_IRQ,
  379. },
  380. {
  381. .start = CH_UART0_RX,
  382. .end = CH_UART0_RX+1,
  383. .flags = IORESOURCE_DMA,
  384. },
  385. };
  386. static struct platform_device bfin_sir0_device = {
  387. .name = "bfin_sir",
  388. .id = 0,
  389. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  390. .resource = bfin_sir0_resources,
  391. };
  392. #endif
  393. #ifdef CONFIG_BFIN_SIR1
  394. static struct resource bfin_sir1_resources[] = {
  395. {
  396. .start = 0xFFC02000,
  397. .end = 0xFFC020FF,
  398. .flags = IORESOURCE_MEM,
  399. },
  400. {
  401. .start = IRQ_UART1_RX,
  402. .end = IRQ_UART1_RX+1,
  403. .flags = IORESOURCE_IRQ,
  404. },
  405. {
  406. .start = CH_UART1_RX,
  407. .end = CH_UART1_RX+1,
  408. .flags = IORESOURCE_DMA,
  409. },
  410. };
  411. static struct platform_device bfin_sir1_device = {
  412. .name = "bfin_sir",
  413. .id = 1,
  414. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  415. .resource = bfin_sir1_resources,
  416. };
  417. #endif
  418. #endif
  419. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  420. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  421. static struct resource bfin_twi0_resource[] = {
  422. [0] = {
  423. .start = TWI0_REGBASE,
  424. .end = TWI0_REGBASE,
  425. .flags = IORESOURCE_MEM,
  426. },
  427. [1] = {
  428. .start = IRQ_TWI,
  429. .end = IRQ_TWI,
  430. .flags = IORESOURCE_IRQ,
  431. },
  432. };
  433. static struct platform_device i2c_bfin_twi_device = {
  434. .name = "i2c-bfin-twi",
  435. .id = 0,
  436. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  437. .resource = bfin_twi0_resource,
  438. .dev = {
  439. .platform_data = &bfin_twi0_pins,
  440. },
  441. };
  442. #endif
  443. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  444. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  445. {
  446. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  447. },
  448. #endif
  449. #if IS_ENABLED(CONFIG_INPUT_PCF8574)
  450. {
  451. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  452. .irq = IRQ_PF8,
  453. },
  454. #endif
  455. };
  456. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  457. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  458. static struct resource bfin_sport0_uart_resources[] = {
  459. {
  460. .start = SPORT0_TCR1,
  461. .end = SPORT0_MRCS3+4,
  462. .flags = IORESOURCE_MEM,
  463. },
  464. {
  465. .start = IRQ_SPORT0_RX,
  466. .end = IRQ_SPORT0_RX+1,
  467. .flags = IORESOURCE_IRQ,
  468. },
  469. {
  470. .start = IRQ_SPORT0_ERROR,
  471. .end = IRQ_SPORT0_ERROR,
  472. .flags = IORESOURCE_IRQ,
  473. },
  474. };
  475. static unsigned short bfin_sport0_peripherals[] = {
  476. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  477. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  478. };
  479. static struct platform_device bfin_sport0_uart_device = {
  480. .name = "bfin-sport-uart",
  481. .id = 0,
  482. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  483. .resource = bfin_sport0_uart_resources,
  484. .dev = {
  485. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  486. },
  487. };
  488. #endif
  489. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  490. static struct resource bfin_sport1_uart_resources[] = {
  491. {
  492. .start = SPORT1_TCR1,
  493. .end = SPORT1_MRCS3+4,
  494. .flags = IORESOURCE_MEM,
  495. },
  496. {
  497. .start = IRQ_SPORT1_RX,
  498. .end = IRQ_SPORT1_RX+1,
  499. .flags = IORESOURCE_IRQ,
  500. },
  501. {
  502. .start = IRQ_SPORT1_ERROR,
  503. .end = IRQ_SPORT1_ERROR,
  504. .flags = IORESOURCE_IRQ,
  505. },
  506. };
  507. static unsigned short bfin_sport1_peripherals[] = {
  508. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  509. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  510. };
  511. static struct platform_device bfin_sport1_uart_device = {
  512. .name = "bfin-sport-uart",
  513. .id = 1,
  514. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  515. .resource = bfin_sport1_uart_resources,
  516. .dev = {
  517. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  518. },
  519. };
  520. #endif
  521. #endif
  522. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  523. #include <linux/input.h>
  524. #include <linux/gpio_keys.h>
  525. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  526. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  527. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  528. };
  529. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  530. .buttons = bfin_gpio_keys_table,
  531. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  532. };
  533. static struct platform_device bfin_device_gpiokeys = {
  534. .name = "gpio-keys",
  535. .dev = {
  536. .platform_data = &bfin_gpio_keys_data,
  537. },
  538. };
  539. #endif
  540. #if IS_ENABLED(CONFIG_SDH_BFIN)
  541. static struct bfin_sd_host bfin_sdh_data = {
  542. .dma_chan = CH_RSI,
  543. .irq_int0 = IRQ_RSI_INT0,
  544. .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
  545. };
  546. static struct platform_device bf51x_sdh_device = {
  547. .name = "bfin-sdh",
  548. .id = 0,
  549. .dev = {
  550. .platform_data = &bfin_sdh_data,
  551. },
  552. };
  553. #endif
  554. static const unsigned int cclk_vlev_datasheet[] =
  555. {
  556. VRPAIR(VLEV_100, 400000000),
  557. VRPAIR(VLEV_105, 426000000),
  558. VRPAIR(VLEV_110, 500000000),
  559. VRPAIR(VLEV_115, 533000000),
  560. VRPAIR(VLEV_120, 600000000),
  561. };
  562. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  563. .tuple_tab = cclk_vlev_datasheet,
  564. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  565. .vr_settling_time = 25 /* us */,
  566. };
  567. static struct platform_device bfin_dpmc = {
  568. .name = "bfin dpmc",
  569. .dev = {
  570. .platform_data = &bfin_dmpc_vreg_data,
  571. },
  572. };
  573. static struct platform_device *tcm_devices[] __initdata = {
  574. &bfin_dpmc,
  575. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  576. &rtc_device,
  577. #endif
  578. #if IS_ENABLED(CONFIG_BFIN_MAC)
  579. &bfin_mii_bus,
  580. &bfin_mac_device,
  581. #endif
  582. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  583. &bfin_spi0_device,
  584. &bfin_spi1_device,
  585. #endif
  586. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  587. #ifdef CONFIG_SERIAL_BFIN_UART0
  588. &bfin_uart0_device,
  589. #endif
  590. #ifdef CONFIG_SERIAL_BFIN_UART1
  591. &bfin_uart1_device,
  592. #endif
  593. #endif
  594. #if IS_ENABLED(CONFIG_BFIN_SIR)
  595. #ifdef CONFIG_BFIN_SIR0
  596. &bfin_sir0_device,
  597. #endif
  598. #ifdef CONFIG_BFIN_SIR1
  599. &bfin_sir1_device,
  600. #endif
  601. #endif
  602. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  603. &i2c_bfin_twi_device,
  604. #endif
  605. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  606. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  607. &bfin_sport0_uart_device,
  608. #endif
  609. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  610. &bfin_sport1_uart_device,
  611. #endif
  612. #endif
  613. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  614. &bfin_device_gpiokeys,
  615. #endif
  616. #if IS_ENABLED(CONFIG_SDH_BFIN)
  617. &bf51x_sdh_device,
  618. #endif
  619. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  620. &tcm_flash_device,
  621. #endif
  622. };
  623. static int __init tcm_init(void)
  624. {
  625. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  626. i2c_register_board_info(0, bfin_i2c_board_info,
  627. ARRAY_SIZE(bfin_i2c_board_info));
  628. platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
  629. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  630. return 0;
  631. }
  632. arch_initcall(tcm_init);
  633. static struct platform_device *tcm_early_devices[] __initdata = {
  634. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  635. #ifdef CONFIG_SERIAL_BFIN_UART0
  636. &bfin_uart0_device,
  637. #endif
  638. #ifdef CONFIG_SERIAL_BFIN_UART1
  639. &bfin_uart1_device,
  640. #endif
  641. #endif
  642. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  643. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  644. &bfin_sport0_uart_device,
  645. #endif
  646. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  647. &bfin_sport1_uart_device,
  648. #endif
  649. #endif
  650. };
  651. void __init native_machine_early_platform_add_devices(void)
  652. {
  653. printk(KERN_INFO "register early platform devices\n");
  654. early_platform_add_devices(tcm_early_devices,
  655. ARRAY_SIZE(tcm_early_devices));
  656. }
  657. void native_machine_restart(char *cmd)
  658. {
  659. /* workaround reboot hang when booting from SPI */
  660. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  661. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  662. }
  663. int bfin_get_ether_addr(char *addr)
  664. {
  665. return 1;
  666. }
  667. EXPORT_SYMBOL(bfin_get_ether_addr);