cm_bf537u.c 17 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/etherdevice.h>
  11. #include <linux/export.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/mtd.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/mtd/physmap.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/spi/flash.h>
  18. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  19. #include <linux/usb/isp1362.h>
  20. #endif
  21. #include <linux/ata_platform.h>
  22. #include <linux/irq.h>
  23. #include <linux/gpio.h>
  24. #include <asm/dma.h>
  25. #include <asm/bfin5xx_spi.h>
  26. #include <asm/portmux.h>
  27. #include <asm/dpmc.h>
  28. #include <linux/spi/mmc_spi.h>
  29. /*
  30. * Name the Board for the /proc/cpuinfo
  31. */
  32. const char bfin_board_name[] = "Bluetechnix CM BF537U";
  33. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  34. /* all SPI peripherals info goes here */
  35. #if IS_ENABLED(CONFIG_MTD_M25P80)
  36. static struct mtd_partition bfin_spi_flash_partitions[] = {
  37. {
  38. .name = "bootloader(spi)",
  39. .size = 0x00020000,
  40. .offset = 0,
  41. .mask_flags = MTD_CAP_ROM
  42. }, {
  43. .name = "linux kernel(spi)",
  44. .size = 0xe0000,
  45. .offset = 0x20000
  46. }, {
  47. .name = "file system(spi)",
  48. .size = 0x700000,
  49. .offset = 0x00100000,
  50. }
  51. };
  52. static struct flash_platform_data bfin_spi_flash_data = {
  53. .name = "m25p80",
  54. .parts = bfin_spi_flash_partitions,
  55. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  56. .type = "m25p64",
  57. };
  58. /* SPI flash chip (m25p64) */
  59. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  60. .enable_dma = 0, /* use dma transfer with this chip*/
  61. };
  62. #endif
  63. #if IS_ENABLED(CONFIG_MMC_SPI)
  64. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  65. .enable_dma = 0,
  66. };
  67. #endif
  68. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  69. #if IS_ENABLED(CONFIG_MTD_M25P80)
  70. {
  71. /* the modalias must be the same as spi device driver name */
  72. .modalias = "m25p80", /* Name of spi_driver for this device */
  73. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  74. .bus_num = 0, /* Framework bus number */
  75. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  76. .platform_data = &bfin_spi_flash_data,
  77. .controller_data = &spi_flash_chip_info,
  78. .mode = SPI_MODE_3,
  79. },
  80. #endif
  81. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  82. {
  83. .modalias = "ad183x",
  84. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  85. .bus_num = 0,
  86. .chip_select = 4,
  87. },
  88. #endif
  89. #if IS_ENABLED(CONFIG_MMC_SPI)
  90. {
  91. .modalias = "mmc_spi",
  92. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  93. .bus_num = 0,
  94. .chip_select = 1,
  95. .controller_data = &mmc_spi_chip_info,
  96. .mode = SPI_MODE_3,
  97. },
  98. #endif
  99. };
  100. /* SPI (0) */
  101. static struct resource bfin_spi0_resource[] = {
  102. [0] = {
  103. .start = SPI0_REGBASE,
  104. .end = SPI0_REGBASE + 0xFF,
  105. .flags = IORESOURCE_MEM,
  106. },
  107. [1] = {
  108. .start = CH_SPI,
  109. .end = CH_SPI,
  110. .flags = IORESOURCE_DMA,
  111. },
  112. [2] = {
  113. .start = IRQ_SPI,
  114. .end = IRQ_SPI,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. };
  118. /* SPI controller data */
  119. static struct bfin5xx_spi_master bfin_spi0_info = {
  120. .num_chipselect = 8,
  121. .enable_dma = 1, /* master has the ability to do dma transfer */
  122. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  123. };
  124. static struct platform_device bfin_spi0_device = {
  125. .name = "bfin-spi",
  126. .id = 0, /* Bus number */
  127. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  128. .resource = bfin_spi0_resource,
  129. .dev = {
  130. .platform_data = &bfin_spi0_info, /* Passed to driver */
  131. },
  132. };
  133. #endif /* spi master and devices */
  134. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  135. static struct platform_device rtc_device = {
  136. .name = "rtc-bfin",
  137. .id = -1,
  138. };
  139. #endif
  140. #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
  141. static struct platform_device hitachi_fb_device = {
  142. .name = "hitachi-tx09",
  143. };
  144. #endif
  145. #if IS_ENABLED(CONFIG_SMC91X)
  146. #include <linux/smc91x.h>
  147. static struct smc91x_platdata smc91x_info = {
  148. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  149. .leda = RPC_LED_100_10,
  150. .ledb = RPC_LED_TX_RX,
  151. };
  152. static struct resource smc91x_resources[] = {
  153. {
  154. .start = 0x20200300,
  155. .end = 0x20200300 + 16,
  156. .flags = IORESOURCE_MEM,
  157. }, {
  158. .start = IRQ_PF14,
  159. .end = IRQ_PF14,
  160. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  161. },
  162. };
  163. static struct platform_device smc91x_device = {
  164. .name = "smc91x",
  165. .id = 0,
  166. .num_resources = ARRAY_SIZE(smc91x_resources),
  167. .resource = smc91x_resources,
  168. .dev = {
  169. .platform_data = &smc91x_info,
  170. },
  171. };
  172. #endif
  173. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  174. static struct resource isp1362_hcd_resources[] = {
  175. {
  176. .start = 0x20308000,
  177. .end = 0x20308000,
  178. .flags = IORESOURCE_MEM,
  179. }, {
  180. .start = 0x20308004,
  181. .end = 0x20308004,
  182. .flags = IORESOURCE_MEM,
  183. }, {
  184. .start = IRQ_PG15,
  185. .end = IRQ_PG15,
  186. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  187. },
  188. };
  189. static struct isp1362_platform_data isp1362_priv = {
  190. .sel15Kres = 1,
  191. .clknotstop = 0,
  192. .oc_enable = 0,
  193. .int_act_high = 0,
  194. .int_edge_triggered = 0,
  195. .remote_wakeup_connected = 0,
  196. .no_power_switching = 1,
  197. .power_switching_mode = 0,
  198. };
  199. static struct platform_device isp1362_hcd_device = {
  200. .name = "isp1362-hcd",
  201. .id = 0,
  202. .dev = {
  203. .platform_data = &isp1362_priv,
  204. },
  205. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  206. .resource = isp1362_hcd_resources,
  207. };
  208. #endif
  209. #if IS_ENABLED(CONFIG_USB_NET2272)
  210. static struct resource net2272_bfin_resources[] = {
  211. {
  212. .start = 0x20200000,
  213. .end = 0x20200000 + 0x100,
  214. .flags = IORESOURCE_MEM,
  215. }, {
  216. .start = IRQ_PH14,
  217. .end = IRQ_PH14,
  218. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  219. },
  220. };
  221. static struct platform_device net2272_bfin_device = {
  222. .name = "net2272",
  223. .id = -1,
  224. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  225. .resource = net2272_bfin_resources,
  226. };
  227. #endif
  228. #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
  229. static struct mtd_partition cm_partitions[] = {
  230. {
  231. .name = "bootloader(nor)",
  232. .size = 0x40000,
  233. .offset = 0,
  234. }, {
  235. .name = "linux kernel(nor)",
  236. .size = 0x100000,
  237. .offset = MTDPART_OFS_APPEND,
  238. }, {
  239. .name = "file system(nor)",
  240. .size = MTDPART_SIZ_FULL,
  241. .offset = MTDPART_OFS_APPEND,
  242. }
  243. };
  244. static struct physmap_flash_data cm_flash_data = {
  245. .width = 2,
  246. .parts = cm_partitions,
  247. .nr_parts = ARRAY_SIZE(cm_partitions),
  248. };
  249. static unsigned cm_flash_gpios[] = { GPIO_PH0 };
  250. static struct resource cm_flash_resource[] = {
  251. {
  252. .name = "cfi_probe",
  253. .start = 0x20000000,
  254. .end = 0x201fffff,
  255. .flags = IORESOURCE_MEM,
  256. }, {
  257. .start = (unsigned long)cm_flash_gpios,
  258. .end = ARRAY_SIZE(cm_flash_gpios),
  259. .flags = IORESOURCE_IRQ,
  260. }
  261. };
  262. static struct platform_device cm_flash_device = {
  263. .name = "gpio-addr-flash",
  264. .id = 0,
  265. .dev = {
  266. .platform_data = &cm_flash_data,
  267. },
  268. .num_resources = ARRAY_SIZE(cm_flash_resource),
  269. .resource = cm_flash_resource,
  270. };
  271. #endif
  272. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  273. #ifdef CONFIG_SERIAL_BFIN_UART0
  274. static struct resource bfin_uart0_resources[] = {
  275. {
  276. .start = UART0_THR,
  277. .end = UART0_GCTL+2,
  278. .flags = IORESOURCE_MEM,
  279. },
  280. {
  281. .start = IRQ_UART0_TX,
  282. .end = IRQ_UART0_TX,
  283. .flags = IORESOURCE_IRQ,
  284. },
  285. {
  286. .start = IRQ_UART0_RX,
  287. .end = IRQ_UART0_RX,
  288. .flags = IORESOURCE_IRQ,
  289. },
  290. {
  291. .start = IRQ_UART0_ERROR,
  292. .end = IRQ_UART0_ERROR,
  293. .flags = IORESOURCE_IRQ,
  294. },
  295. {
  296. .start = CH_UART0_TX,
  297. .end = CH_UART0_TX,
  298. .flags = IORESOURCE_DMA,
  299. },
  300. {
  301. .start = CH_UART0_RX,
  302. .end = CH_UART0_RX,
  303. .flags = IORESOURCE_DMA,
  304. },
  305. };
  306. static unsigned short bfin_uart0_peripherals[] = {
  307. P_UART0_TX, P_UART0_RX, 0
  308. };
  309. static struct platform_device bfin_uart0_device = {
  310. .name = "bfin-uart",
  311. .id = 0,
  312. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  313. .resource = bfin_uart0_resources,
  314. .dev = {
  315. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  316. },
  317. };
  318. #endif
  319. #ifdef CONFIG_SERIAL_BFIN_UART1
  320. static struct resource bfin_uart1_resources[] = {
  321. {
  322. .start = UART1_THR,
  323. .end = UART1_GCTL+2,
  324. .flags = IORESOURCE_MEM,
  325. },
  326. {
  327. .start = IRQ_UART1_TX,
  328. .end = IRQ_UART1_TX,
  329. .flags = IORESOURCE_IRQ,
  330. },
  331. {
  332. .start = IRQ_UART1_RX,
  333. .end = IRQ_UART1_RX,
  334. .flags = IORESOURCE_IRQ,
  335. },
  336. {
  337. .start = IRQ_UART1_ERROR,
  338. .end = IRQ_UART1_ERROR,
  339. .flags = IORESOURCE_IRQ,
  340. },
  341. {
  342. .start = CH_UART1_TX,
  343. .end = CH_UART1_TX,
  344. .flags = IORESOURCE_DMA,
  345. },
  346. {
  347. .start = CH_UART1_RX,
  348. .end = CH_UART1_RX,
  349. .flags = IORESOURCE_DMA,
  350. },
  351. };
  352. static unsigned short bfin_uart1_peripherals[] = {
  353. P_UART1_TX, P_UART1_RX, 0
  354. };
  355. static struct platform_device bfin_uart1_device = {
  356. .name = "bfin-uart",
  357. .id = 1,
  358. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  359. .resource = bfin_uart1_resources,
  360. .dev = {
  361. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  362. },
  363. };
  364. #endif
  365. #endif
  366. #if IS_ENABLED(CONFIG_BFIN_SIR)
  367. #ifdef CONFIG_BFIN_SIR0
  368. static struct resource bfin_sir0_resources[] = {
  369. {
  370. .start = 0xFFC00400,
  371. .end = 0xFFC004FF,
  372. .flags = IORESOURCE_MEM,
  373. },
  374. {
  375. .start = IRQ_UART0_RX,
  376. .end = IRQ_UART0_RX+1,
  377. .flags = IORESOURCE_IRQ,
  378. },
  379. {
  380. .start = CH_UART0_RX,
  381. .end = CH_UART0_RX+1,
  382. .flags = IORESOURCE_DMA,
  383. },
  384. };
  385. static struct platform_device bfin_sir0_device = {
  386. .name = "bfin_sir",
  387. .id = 0,
  388. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  389. .resource = bfin_sir0_resources,
  390. };
  391. #endif
  392. #ifdef CONFIG_BFIN_SIR1
  393. static struct resource bfin_sir1_resources[] = {
  394. {
  395. .start = 0xFFC02000,
  396. .end = 0xFFC020FF,
  397. .flags = IORESOURCE_MEM,
  398. },
  399. {
  400. .start = IRQ_UART1_RX,
  401. .end = IRQ_UART1_RX+1,
  402. .flags = IORESOURCE_IRQ,
  403. },
  404. {
  405. .start = CH_UART1_RX,
  406. .end = CH_UART1_RX+1,
  407. .flags = IORESOURCE_DMA,
  408. },
  409. };
  410. static struct platform_device bfin_sir1_device = {
  411. .name = "bfin_sir",
  412. .id = 1,
  413. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  414. .resource = bfin_sir1_resources,
  415. };
  416. #endif
  417. #endif
  418. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  419. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  420. static struct resource bfin_twi0_resource[] = {
  421. [0] = {
  422. .start = TWI0_REGBASE,
  423. .end = TWI0_REGBASE,
  424. .flags = IORESOURCE_MEM,
  425. },
  426. [1] = {
  427. .start = IRQ_TWI,
  428. .end = IRQ_TWI,
  429. .flags = IORESOURCE_IRQ,
  430. },
  431. };
  432. static struct platform_device i2c_bfin_twi_device = {
  433. .name = "i2c-bfin-twi",
  434. .id = 0,
  435. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  436. .resource = bfin_twi0_resource,
  437. .dev = {
  438. .platform_data = &bfin_twi0_pins,
  439. },
  440. };
  441. #endif
  442. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  443. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  444. static struct resource bfin_sport0_uart_resources[] = {
  445. {
  446. .start = SPORT0_TCR1,
  447. .end = SPORT0_MRCS3+4,
  448. .flags = IORESOURCE_MEM,
  449. },
  450. {
  451. .start = IRQ_SPORT0_RX,
  452. .end = IRQ_SPORT0_RX+1,
  453. .flags = IORESOURCE_IRQ,
  454. },
  455. {
  456. .start = IRQ_SPORT0_ERROR,
  457. .end = IRQ_SPORT0_ERROR,
  458. .flags = IORESOURCE_IRQ,
  459. },
  460. };
  461. static unsigned short bfin_sport0_peripherals[] = {
  462. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  463. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  464. };
  465. static struct platform_device bfin_sport0_uart_device = {
  466. .name = "bfin-sport-uart",
  467. .id = 0,
  468. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  469. .resource = bfin_sport0_uart_resources,
  470. .dev = {
  471. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  472. },
  473. };
  474. #endif
  475. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  476. static struct resource bfin_sport1_uart_resources[] = {
  477. {
  478. .start = SPORT1_TCR1,
  479. .end = SPORT1_MRCS3+4,
  480. .flags = IORESOURCE_MEM,
  481. },
  482. {
  483. .start = IRQ_SPORT1_RX,
  484. .end = IRQ_SPORT1_RX+1,
  485. .flags = IORESOURCE_IRQ,
  486. },
  487. {
  488. .start = IRQ_SPORT1_ERROR,
  489. .end = IRQ_SPORT1_ERROR,
  490. .flags = IORESOURCE_IRQ,
  491. },
  492. };
  493. static unsigned short bfin_sport1_peripherals[] = {
  494. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  495. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  496. };
  497. static struct platform_device bfin_sport1_uart_device = {
  498. .name = "bfin-sport-uart",
  499. .id = 1,
  500. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  501. .resource = bfin_sport1_uart_resources,
  502. .dev = {
  503. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  504. },
  505. };
  506. #endif
  507. #endif
  508. #if IS_ENABLED(CONFIG_BFIN_MAC)
  509. #include <linux/bfin_mac.h>
  510. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  511. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  512. {
  513. .addr = 1,
  514. .irq = IRQ_MAC_PHYINT,
  515. },
  516. };
  517. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  518. .phydev_number = 1,
  519. .phydev_data = bfin_phydev_data,
  520. .phy_mode = PHY_INTERFACE_MODE_MII,
  521. .mac_peripherals = bfin_mac_peripherals,
  522. };
  523. static struct platform_device bfin_mii_bus = {
  524. .name = "bfin_mii_bus",
  525. .dev = {
  526. .platform_data = &bfin_mii_bus_data,
  527. }
  528. };
  529. static struct platform_device bfin_mac_device = {
  530. .name = "bfin_mac",
  531. .dev = {
  532. .platform_data = &bfin_mii_bus,
  533. }
  534. };
  535. #endif
  536. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  537. #define PATA_INT IRQ_PF14
  538. static struct pata_platform_info bfin_pata_platform_data = {
  539. .ioport_shift = 2,
  540. };
  541. static struct resource bfin_pata_resources[] = {
  542. {
  543. .start = 0x2030C000,
  544. .end = 0x2030C01F,
  545. .flags = IORESOURCE_MEM,
  546. },
  547. {
  548. .start = 0x2030D018,
  549. .end = 0x2030D01B,
  550. .flags = IORESOURCE_MEM,
  551. },
  552. {
  553. .start = PATA_INT,
  554. .end = PATA_INT,
  555. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  556. },
  557. };
  558. static struct platform_device bfin_pata_device = {
  559. .name = "pata_platform",
  560. .id = -1,
  561. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  562. .resource = bfin_pata_resources,
  563. .dev = {
  564. .platform_data = &bfin_pata_platform_data,
  565. }
  566. };
  567. #endif
  568. static const unsigned int cclk_vlev_datasheet[] =
  569. {
  570. VRPAIR(VLEV_085, 250000000),
  571. VRPAIR(VLEV_090, 376000000),
  572. VRPAIR(VLEV_095, 426000000),
  573. VRPAIR(VLEV_100, 426000000),
  574. VRPAIR(VLEV_105, 476000000),
  575. VRPAIR(VLEV_110, 476000000),
  576. VRPAIR(VLEV_115, 476000000),
  577. VRPAIR(VLEV_120, 500000000),
  578. VRPAIR(VLEV_125, 533000000),
  579. VRPAIR(VLEV_130, 600000000),
  580. };
  581. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  582. .tuple_tab = cclk_vlev_datasheet,
  583. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  584. .vr_settling_time = 25 /* us */,
  585. };
  586. static struct platform_device bfin_dpmc = {
  587. .name = "bfin dpmc",
  588. .dev = {
  589. .platform_data = &bfin_dmpc_vreg_data,
  590. },
  591. };
  592. static struct platform_device *cm_bf537u_devices[] __initdata = {
  593. &bfin_dpmc,
  594. #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
  595. &hitachi_fb_device,
  596. #endif
  597. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  598. &rtc_device,
  599. #endif
  600. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  601. #ifdef CONFIG_SERIAL_BFIN_UART0
  602. &bfin_uart0_device,
  603. #endif
  604. #ifdef CONFIG_SERIAL_BFIN_UART1
  605. &bfin_uart1_device,
  606. #endif
  607. #endif
  608. #if IS_ENABLED(CONFIG_BFIN_SIR)
  609. #ifdef CONFIG_BFIN_SIR0
  610. &bfin_sir0_device,
  611. #endif
  612. #ifdef CONFIG_BFIN_SIR1
  613. &bfin_sir1_device,
  614. #endif
  615. #endif
  616. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  617. &i2c_bfin_twi_device,
  618. #endif
  619. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  620. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  621. &bfin_sport0_uart_device,
  622. #endif
  623. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  624. &bfin_sport1_uart_device,
  625. #endif
  626. #endif
  627. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  628. &isp1362_hcd_device,
  629. #endif
  630. #if IS_ENABLED(CONFIG_SMC91X)
  631. &smc91x_device,
  632. #endif
  633. #if IS_ENABLED(CONFIG_BFIN_MAC)
  634. &bfin_mii_bus,
  635. &bfin_mac_device,
  636. #endif
  637. #if IS_ENABLED(CONFIG_USB_NET2272)
  638. &net2272_bfin_device,
  639. #endif
  640. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  641. &bfin_spi0_device,
  642. #endif
  643. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  644. &bfin_pata_device,
  645. #endif
  646. #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
  647. &cm_flash_device,
  648. #endif
  649. };
  650. static int __init net2272_init(void)
  651. {
  652. #if IS_ENABLED(CONFIG_USB_NET2272)
  653. int ret;
  654. ret = gpio_request(GPIO_PH15, driver_name);
  655. if (ret)
  656. return ret;
  657. ret = gpio_request(GPIO_PH13, "net2272");
  658. if (ret) {
  659. gpio_free(GPIO_PH15);
  660. return ret;
  661. }
  662. /* Set PH15 Low make /AMS2 work properly */
  663. gpio_direction_output(GPIO_PH15, 0);
  664. /* enable CLKBUF output */
  665. bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
  666. /* Reset the USB chip */
  667. gpio_direction_output(GPIO_PH13, 0);
  668. mdelay(2);
  669. gpio_set_value(GPIO_PH13, 1);
  670. #endif
  671. return 0;
  672. }
  673. static int __init cm_bf537u_init(void)
  674. {
  675. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  676. platform_add_devices(cm_bf537u_devices, ARRAY_SIZE(cm_bf537u_devices));
  677. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  678. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  679. #endif
  680. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  681. irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
  682. #endif
  683. if (net2272_init())
  684. pr_warning("unable to configure net2272; it probably won't work\n");
  685. return 0;
  686. }
  687. arch_initcall(cm_bf537u_init);
  688. static struct platform_device *cm_bf537u_early_devices[] __initdata = {
  689. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  690. #ifdef CONFIG_SERIAL_BFIN_UART0
  691. &bfin_uart0_device,
  692. #endif
  693. #ifdef CONFIG_SERIAL_BFIN_UART1
  694. &bfin_uart1_device,
  695. #endif
  696. #endif
  697. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  698. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  699. &bfin_sport0_uart_device,
  700. #endif
  701. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  702. &bfin_sport1_uart_device,
  703. #endif
  704. #endif
  705. };
  706. void __init native_machine_early_platform_add_devices(void)
  707. {
  708. printk(KERN_INFO "register early platform devices\n");
  709. early_platform_add_devices(cm_bf537u_early_devices,
  710. ARRAY_SIZE(cm_bf537u_early_devices));
  711. }
  712. int bfin_get_ether_addr(char *addr)
  713. {
  714. return 1;
  715. }
  716. EXPORT_SYMBOL(bfin_get_ether_addr);