stamp.c 71 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/export.h>
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/io.h>
  13. #include <linux/mtd/mtd.h>
  14. #include <linux/mtd/nand.h>
  15. #include <linux/mtd/partitions.h>
  16. #include <linux/mtd/plat-ram.h>
  17. #include <linux/mtd/physmap.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/flash.h>
  20. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  21. #include <linux/usb/isp1362.h>
  22. #endif
  23. #include <linux/i2c.h>
  24. #include <linux/i2c/adp5588.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/ata_platform.h>
  27. #include <linux/irq.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/usb/sl811.h>
  30. #include <linux/spi/mmc_spi.h>
  31. #include <linux/leds.h>
  32. #include <linux/input.h>
  33. #include <asm/dma.h>
  34. #include <asm/bfin5xx_spi.h>
  35. #include <asm/reboot.h>
  36. #include <asm/portmux.h>
  37. #include <asm/dpmc.h>
  38. #include <asm/bfin_sport.h>
  39. #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
  40. #include <linux/regulator/fixed.h>
  41. #endif
  42. #include <linux/regulator/machine.h>
  43. #include <linux/regulator/consumer.h>
  44. #include <linux/regulator/userspace-consumer.h>
  45. /*
  46. * Name the Board for the /proc/cpuinfo
  47. */
  48. const char bfin_board_name[] = "ADI BF537-STAMP";
  49. /*
  50. * Driver needs to know address, irq and flag pin.
  51. */
  52. #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
  53. #include <linux/usb/isp1760.h>
  54. static struct resource bfin_isp1760_resources[] = {
  55. [0] = {
  56. .start = 0x203C0000,
  57. .end = 0x203C0000 + 0x000fffff,
  58. .flags = IORESOURCE_MEM,
  59. },
  60. [1] = {
  61. .start = IRQ_PF7,
  62. .end = IRQ_PF7,
  63. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  64. },
  65. };
  66. static struct isp1760_platform_data isp1760_priv = {
  67. .is_isp1761 = 0,
  68. .bus_width_16 = 1,
  69. .port1_otg = 0,
  70. .analog_oc = 0,
  71. .dack_polarity_high = 0,
  72. .dreq_polarity_high = 0,
  73. };
  74. static struct platform_device bfin_isp1760_device = {
  75. .name = "isp1760",
  76. .id = 0,
  77. .dev = {
  78. .platform_data = &isp1760_priv,
  79. },
  80. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  81. .resource = bfin_isp1760_resources,
  82. };
  83. #endif
  84. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  85. #include <linux/gpio_keys.h>
  86. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  87. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  88. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  89. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  90. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  91. };
  92. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  93. .buttons = bfin_gpio_keys_table,
  94. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  95. };
  96. static struct platform_device bfin_device_gpiokeys = {
  97. .name = "gpio-keys",
  98. .dev = {
  99. .platform_data = &bfin_gpio_keys_data,
  100. },
  101. };
  102. #endif
  103. #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
  104. static struct resource bfin_pcmcia_cf_resources[] = {
  105. {
  106. .start = 0x20310000, /* IO PORT */
  107. .end = 0x20312000,
  108. .flags = IORESOURCE_MEM,
  109. }, {
  110. .start = 0x20311000, /* Attribute Memory */
  111. .end = 0x20311FFF,
  112. .flags = IORESOURCE_MEM,
  113. }, {
  114. .start = IRQ_PF4,
  115. .end = IRQ_PF4,
  116. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  117. }, {
  118. .start = 6, /* Card Detect PF6 */
  119. .end = 6,
  120. .flags = IORESOURCE_IRQ,
  121. },
  122. };
  123. static struct platform_device bfin_pcmcia_cf_device = {
  124. .name = "bfin_cf_pcmcia",
  125. .id = -1,
  126. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  127. .resource = bfin_pcmcia_cf_resources,
  128. };
  129. #endif
  130. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  131. static struct platform_device rtc_device = {
  132. .name = "rtc-bfin",
  133. .id = -1,
  134. };
  135. #endif
  136. #if IS_ENABLED(CONFIG_SMC91X)
  137. #include <linux/smc91x.h>
  138. static struct smc91x_platdata smc91x_info = {
  139. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  140. .leda = RPC_LED_100_10,
  141. .ledb = RPC_LED_TX_RX,
  142. };
  143. static struct resource smc91x_resources[] = {
  144. {
  145. .name = "smc91x-regs",
  146. .start = 0x20300300,
  147. .end = 0x20300300 + 16,
  148. .flags = IORESOURCE_MEM,
  149. }, {
  150. .start = IRQ_PF7,
  151. .end = IRQ_PF7,
  152. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  153. },
  154. };
  155. static struct platform_device smc91x_device = {
  156. .name = "smc91x",
  157. .id = 0,
  158. .num_resources = ARRAY_SIZE(smc91x_resources),
  159. .resource = smc91x_resources,
  160. .dev = {
  161. .platform_data = &smc91x_info,
  162. },
  163. };
  164. #endif
  165. #if IS_ENABLED(CONFIG_DM9000)
  166. static struct resource dm9000_resources[] = {
  167. [0] = {
  168. .start = 0x203FB800,
  169. .end = 0x203FB800 + 1,
  170. .flags = IORESOURCE_MEM,
  171. },
  172. [1] = {
  173. .start = 0x203FB804,
  174. .end = 0x203FB804 + 1,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. [2] = {
  178. .start = IRQ_PF9,
  179. .end = IRQ_PF9,
  180. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  181. },
  182. };
  183. static struct platform_device dm9000_device = {
  184. .name = "dm9000",
  185. .id = -1,
  186. .num_resources = ARRAY_SIZE(dm9000_resources),
  187. .resource = dm9000_resources,
  188. };
  189. #endif
  190. #if IS_ENABLED(CONFIG_USB_SL811_HCD)
  191. static struct resource sl811_hcd_resources[] = {
  192. {
  193. .start = 0x20340000,
  194. .end = 0x20340000,
  195. .flags = IORESOURCE_MEM,
  196. }, {
  197. .start = 0x20340004,
  198. .end = 0x20340004,
  199. .flags = IORESOURCE_MEM,
  200. }, {
  201. .start = IRQ_PF4,
  202. .end = IRQ_PF4,
  203. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  204. },
  205. };
  206. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  207. void sl811_port_power(struct device *dev, int is_on)
  208. {
  209. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  210. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  211. }
  212. #endif
  213. static struct sl811_platform_data sl811_priv = {
  214. .potpg = 10,
  215. .power = 250, /* == 500mA */
  216. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  217. .port_power = &sl811_port_power,
  218. #endif
  219. };
  220. static struct platform_device sl811_hcd_device = {
  221. .name = "sl811-hcd",
  222. .id = 0,
  223. .dev = {
  224. .platform_data = &sl811_priv,
  225. },
  226. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  227. .resource = sl811_hcd_resources,
  228. };
  229. #endif
  230. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  231. static struct resource isp1362_hcd_resources[] = {
  232. {
  233. .start = 0x20360000,
  234. .end = 0x20360000,
  235. .flags = IORESOURCE_MEM,
  236. }, {
  237. .start = 0x20360004,
  238. .end = 0x20360004,
  239. .flags = IORESOURCE_MEM,
  240. }, {
  241. .start = IRQ_PF3,
  242. .end = IRQ_PF3,
  243. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  244. },
  245. };
  246. static struct isp1362_platform_data isp1362_priv = {
  247. .sel15Kres = 1,
  248. .clknotstop = 0,
  249. .oc_enable = 0,
  250. .int_act_high = 0,
  251. .int_edge_triggered = 0,
  252. .remote_wakeup_connected = 0,
  253. .no_power_switching = 1,
  254. .power_switching_mode = 0,
  255. };
  256. static struct platform_device isp1362_hcd_device = {
  257. .name = "isp1362-hcd",
  258. .id = 0,
  259. .dev = {
  260. .platform_data = &isp1362_priv,
  261. },
  262. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  263. .resource = isp1362_hcd_resources,
  264. };
  265. #endif
  266. #if IS_ENABLED(CONFIG_CAN_BFIN)
  267. static unsigned short bfin_can_peripherals[] = {
  268. P_CAN0_RX, P_CAN0_TX, 0
  269. };
  270. static struct resource bfin_can_resources[] = {
  271. {
  272. .start = 0xFFC02A00,
  273. .end = 0xFFC02FFF,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. {
  277. .start = IRQ_CAN_RX,
  278. .end = IRQ_CAN_RX,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. {
  282. .start = IRQ_CAN_TX,
  283. .end = IRQ_CAN_TX,
  284. .flags = IORESOURCE_IRQ,
  285. },
  286. {
  287. .start = IRQ_CAN_ERROR,
  288. .end = IRQ_CAN_ERROR,
  289. .flags = IORESOURCE_IRQ,
  290. },
  291. };
  292. static struct platform_device bfin_can_device = {
  293. .name = "bfin_can",
  294. .num_resources = ARRAY_SIZE(bfin_can_resources),
  295. .resource = bfin_can_resources,
  296. .dev = {
  297. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  298. },
  299. };
  300. #endif
  301. #if IS_ENABLED(CONFIG_BFIN_MAC)
  302. #include <linux/bfin_mac.h>
  303. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  304. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  305. {
  306. .addr = 1,
  307. .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
  308. },
  309. };
  310. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  311. .phydev_number = 1,
  312. .phydev_data = bfin_phydev_data,
  313. .phy_mode = PHY_INTERFACE_MODE_MII,
  314. .mac_peripherals = bfin_mac_peripherals,
  315. };
  316. static struct platform_device bfin_mii_bus = {
  317. .name = "bfin_mii_bus",
  318. .dev = {
  319. .platform_data = &bfin_mii_bus_data,
  320. }
  321. };
  322. static struct platform_device bfin_mac_device = {
  323. .name = "bfin_mac",
  324. .dev = {
  325. .platform_data = &bfin_mii_bus,
  326. }
  327. };
  328. #endif
  329. #if IS_ENABLED(CONFIG_USB_NET2272)
  330. static struct resource net2272_bfin_resources[] = {
  331. {
  332. .start = 0x20300000,
  333. .end = 0x20300000 + 0x100,
  334. .flags = IORESOURCE_MEM,
  335. }, {
  336. .start = 1,
  337. .flags = IORESOURCE_BUS,
  338. }, {
  339. .start = IRQ_PF7,
  340. .end = IRQ_PF7,
  341. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  342. },
  343. };
  344. static struct platform_device net2272_bfin_device = {
  345. .name = "net2272",
  346. .id = -1,
  347. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  348. .resource = net2272_bfin_resources,
  349. };
  350. #endif
  351. #if IS_ENABLED(CONFIG_MTD_NAND_PLATFORM)
  352. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  353. static struct mtd_partition bfin_plat_nand_partitions[] = {
  354. {
  355. .name = "linux kernel(nand)",
  356. .size = 0x400000,
  357. .offset = 0,
  358. }, {
  359. .name = "file system(nand)",
  360. .size = MTDPART_SIZ_FULL,
  361. .offset = MTDPART_OFS_APPEND,
  362. },
  363. };
  364. #define BFIN_NAND_PLAT_CLE 2
  365. #define BFIN_NAND_PLAT_ALE 1
  366. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  367. {
  368. struct nand_chip *this = mtd->priv;
  369. if (cmd == NAND_CMD_NONE)
  370. return;
  371. if (ctrl & NAND_CLE)
  372. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  373. else
  374. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  375. }
  376. #define BFIN_NAND_PLAT_READY GPIO_PF3
  377. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  378. {
  379. return gpio_get_value(BFIN_NAND_PLAT_READY);
  380. }
  381. static struct platform_nand_data bfin_plat_nand_data = {
  382. .chip = {
  383. .nr_chips = 1,
  384. .chip_delay = 30,
  385. .part_probe_types = part_probes,
  386. .partitions = bfin_plat_nand_partitions,
  387. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  388. },
  389. .ctrl = {
  390. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  391. .dev_ready = bfin_plat_nand_dev_ready,
  392. },
  393. };
  394. #define MAX(x, y) (x > y ? x : y)
  395. static struct resource bfin_plat_nand_resources = {
  396. .start = 0x20212000,
  397. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  398. .flags = IORESOURCE_MEM,
  399. };
  400. static struct platform_device bfin_async_nand_device = {
  401. .name = "gen_nand",
  402. .id = -1,
  403. .num_resources = 1,
  404. .resource = &bfin_plat_nand_resources,
  405. .dev = {
  406. .platform_data = &bfin_plat_nand_data,
  407. },
  408. };
  409. static void bfin_plat_nand_init(void)
  410. {
  411. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  412. gpio_direction_input(BFIN_NAND_PLAT_READY);
  413. }
  414. #else
  415. static void bfin_plat_nand_init(void) {}
  416. #endif
  417. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  418. static struct mtd_partition stamp_partitions[] = {
  419. {
  420. .name = "bootloader(nor)",
  421. .size = 0x40000,
  422. .offset = 0,
  423. }, {
  424. .name = "linux kernel(nor)",
  425. .size = 0x180000,
  426. .offset = MTDPART_OFS_APPEND,
  427. }, {
  428. .name = "file system(nor)",
  429. .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
  430. .offset = MTDPART_OFS_APPEND,
  431. }, {
  432. .name = "MAC Address(nor)",
  433. .size = MTDPART_SIZ_FULL,
  434. .offset = 0x3F0000,
  435. .mask_flags = MTD_WRITEABLE,
  436. }
  437. };
  438. static struct physmap_flash_data stamp_flash_data = {
  439. .width = 2,
  440. .parts = stamp_partitions,
  441. .nr_parts = ARRAY_SIZE(stamp_partitions),
  442. #ifdef CONFIG_ROMKERNEL
  443. .probe_type = "map_rom",
  444. #endif
  445. };
  446. static struct resource stamp_flash_resource = {
  447. .start = 0x20000000,
  448. .end = 0x203fffff,
  449. .flags = IORESOURCE_MEM,
  450. };
  451. static struct platform_device stamp_flash_device = {
  452. .name = "physmap-flash",
  453. .id = 0,
  454. .dev = {
  455. .platform_data = &stamp_flash_data,
  456. },
  457. .num_resources = 1,
  458. .resource = &stamp_flash_resource,
  459. };
  460. #endif
  461. #if IS_ENABLED(CONFIG_MTD_M25P80)
  462. static struct mtd_partition bfin_spi_flash_partitions[] = {
  463. {
  464. .name = "bootloader(spi)",
  465. .size = 0x00040000,
  466. .offset = 0,
  467. .mask_flags = MTD_CAP_ROM
  468. }, {
  469. .name = "linux kernel(spi)",
  470. .size = 0x180000,
  471. .offset = MTDPART_OFS_APPEND,
  472. }, {
  473. .name = "file system(spi)",
  474. .size = MTDPART_SIZ_FULL,
  475. .offset = MTDPART_OFS_APPEND,
  476. }
  477. };
  478. static struct flash_platform_data bfin_spi_flash_data = {
  479. .name = "m25p80",
  480. .parts = bfin_spi_flash_partitions,
  481. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  482. /* .type = "m25p64", */
  483. };
  484. /* SPI flash chip (m25p64) */
  485. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  486. .enable_dma = 0, /* use dma transfer with this chip*/
  487. };
  488. #endif
  489. #if IS_ENABLED(CONFIG_INPUT_AD714X_SPI)
  490. #include <linux/input/ad714x.h>
  491. static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
  492. {
  493. .start_stage = 0,
  494. .end_stage = 7,
  495. .max_coord = 128,
  496. },
  497. };
  498. static struct ad714x_button_plat ad7147_spi_button_plat[] = {
  499. {
  500. .keycode = BTN_FORWARD,
  501. .l_mask = 0,
  502. .h_mask = 0x600,
  503. },
  504. {
  505. .keycode = BTN_LEFT,
  506. .l_mask = 0,
  507. .h_mask = 0x500,
  508. },
  509. {
  510. .keycode = BTN_MIDDLE,
  511. .l_mask = 0,
  512. .h_mask = 0x800,
  513. },
  514. {
  515. .keycode = BTN_RIGHT,
  516. .l_mask = 0x100,
  517. .h_mask = 0x400,
  518. },
  519. {
  520. .keycode = BTN_BACK,
  521. .l_mask = 0x200,
  522. .h_mask = 0x400,
  523. },
  524. };
  525. static struct ad714x_platform_data ad7147_spi_platform_data = {
  526. .slider_num = 1,
  527. .button_num = 5,
  528. .slider = ad7147_spi_slider_plat,
  529. .button = ad7147_spi_button_plat,
  530. .stage_cfg_reg = {
  531. {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  532. {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  533. {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
  534. {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
  535. {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
  536. {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
  537. {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  538. {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  539. {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
  540. {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
  541. {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
  542. {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
  543. },
  544. .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
  545. };
  546. #endif
  547. #if IS_ENABLED(CONFIG_INPUT_AD714X_I2C)
  548. #include <linux/input/ad714x.h>
  549. static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
  550. {
  551. .keycode = BTN_1,
  552. .l_mask = 0,
  553. .h_mask = 0x1,
  554. },
  555. {
  556. .keycode = BTN_2,
  557. .l_mask = 0,
  558. .h_mask = 0x2,
  559. },
  560. {
  561. .keycode = BTN_3,
  562. .l_mask = 0,
  563. .h_mask = 0x4,
  564. },
  565. {
  566. .keycode = BTN_4,
  567. .l_mask = 0x0,
  568. .h_mask = 0x8,
  569. },
  570. };
  571. static struct ad714x_platform_data ad7142_i2c_platform_data = {
  572. .button_num = 4,
  573. .button = ad7142_i2c_button_plat,
  574. .stage_cfg_reg = {
  575. /* fixme: figure out right setting for all comoponent according
  576. * to hardware feature of EVAL-AD7142EB board */
  577. {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  578. {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  579. {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  580. {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  581. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  582. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  583. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  584. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  585. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  586. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  587. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  588. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  589. },
  590. .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
  591. };
  592. #endif
  593. #if IS_ENABLED(CONFIG_AD2S90)
  594. static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
  595. .enable_dma = 0,
  596. };
  597. #endif
  598. #if IS_ENABLED(CONFIG_AD2S1200)
  599. static unsigned short ad2s1200_platform_data[] = {
  600. /* used as SAMPLE and RDVEL */
  601. GPIO_PF5, GPIO_PF6, 0
  602. };
  603. static struct bfin5xx_spi_chip ad2s1200_spi_chip_info = {
  604. .enable_dma = 0,
  605. };
  606. #endif
  607. #if IS_ENABLED(CONFIG_AD2S1210)
  608. static unsigned short ad2s1210_platform_data[] = {
  609. /* use as SAMPLE, A0, A1 */
  610. GPIO_PF7, GPIO_PF8, GPIO_PF9,
  611. # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
  612. /* the RES0 and RES1 pins */
  613. GPIO_PF4, GPIO_PF5,
  614. # endif
  615. 0,
  616. };
  617. static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
  618. .enable_dma = 0,
  619. };
  620. #endif
  621. #if IS_ENABLED(CONFIG_SENSORS_AD7314)
  622. static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
  623. .enable_dma = 0,
  624. };
  625. #endif
  626. #if IS_ENABLED(CONFIG_AD7816)
  627. static unsigned short ad7816_platform_data[] = {
  628. GPIO_PF4, /* rdwr_pin */
  629. GPIO_PF5, /* convert_pin */
  630. GPIO_PF7, /* busy_pin */
  631. 0,
  632. };
  633. static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
  634. .enable_dma = 0,
  635. };
  636. #endif
  637. #if IS_ENABLED(CONFIG_ADT7310)
  638. static unsigned long adt7310_platform_data[3] = {
  639. /* INT bound temperature alarm event. line 1 */
  640. IRQ_PG4, IRQF_TRIGGER_LOW,
  641. /* CT bound temperature alarm event irq_flags. line 0 */
  642. IRQF_TRIGGER_LOW,
  643. };
  644. static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
  645. .enable_dma = 0,
  646. };
  647. #endif
  648. #if IS_ENABLED(CONFIG_AD7298)
  649. static unsigned short ad7298_platform_data[] = {
  650. GPIO_PF7, /* busy_pin */
  651. 0,
  652. };
  653. #endif
  654. #if IS_ENABLED(CONFIG_ADT7316_SPI)
  655. static unsigned long adt7316_spi_data[2] = {
  656. IRQF_TRIGGER_LOW, /* interrupt flags */
  657. GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  658. };
  659. static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
  660. .enable_dma = 0,
  661. };
  662. #endif
  663. #if IS_ENABLED(CONFIG_MMC_SPI)
  664. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  665. static int bfin_mmc_spi_init(struct device *dev,
  666. irqreturn_t (*detect_int)(int, void *), void *data)
  667. {
  668. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  669. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  670. }
  671. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  672. {
  673. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  674. }
  675. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  676. .init = bfin_mmc_spi_init,
  677. .exit = bfin_mmc_spi_exit,
  678. .detect_delay = 100, /* msecs */
  679. };
  680. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  681. .enable_dma = 0,
  682. .pio_interrupt = 0,
  683. };
  684. #endif
  685. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  686. #include <linux/spi/ad7877.h>
  687. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  688. .model = 7877,
  689. .vref_delay_usecs = 50, /* internal, no capacitor */
  690. .x_plate_ohms = 419,
  691. .y_plate_ohms = 486,
  692. .pressure_max = 1000,
  693. .pressure_min = 0,
  694. .stopacq_polarity = 1,
  695. .first_conversion_delay = 3,
  696. .acquisition_time = 1,
  697. .averaging = 1,
  698. .pen_down_acc_interval = 1,
  699. };
  700. #endif
  701. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879)
  702. #include <linux/spi/ad7879.h>
  703. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  704. .model = 7879, /* Model = AD7879 */
  705. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  706. .pressure_max = 10000,
  707. .pressure_min = 0,
  708. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  709. .acquisition_time = 1, /* 4us acquisition time per sample */
  710. .median = 2, /* do 8 measurements */
  711. .averaging = 1, /* take the average of 4 middle samples */
  712. .pen_down_acc_interval = 255, /* 9.4 ms */
  713. .gpio_export = 1, /* Export GPIO to gpiolib */
  714. .gpio_base = -1, /* Dynamic allocation */
  715. };
  716. #endif
  717. #if IS_ENABLED(CONFIG_INPUT_ADXL34X)
  718. #include <linux/input/adxl34x.h>
  719. static const struct adxl34x_platform_data adxl34x_info = {
  720. .x_axis_offset = 0,
  721. .y_axis_offset = 0,
  722. .z_axis_offset = 0,
  723. .tap_threshold = 0x31,
  724. .tap_duration = 0x10,
  725. .tap_latency = 0x60,
  726. .tap_window = 0xF0,
  727. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  728. .act_axis_control = 0xFF,
  729. .activity_threshold = 5,
  730. .inactivity_threshold = 3,
  731. .inactivity_time = 4,
  732. .free_fall_threshold = 0x7,
  733. .free_fall_time = 0x20,
  734. .data_rate = 0x8,
  735. .data_range = ADXL_FULL_RES,
  736. .ev_type = EV_ABS,
  737. .ev_code_x = ABS_X, /* EV_REL */
  738. .ev_code_y = ABS_Y, /* EV_REL */
  739. .ev_code_z = ABS_Z, /* EV_REL */
  740. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  741. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  742. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  743. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  744. .fifo_mode = ADXL_FIFO_STREAM,
  745. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  746. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  747. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  748. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  749. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  750. };
  751. #endif
  752. #if IS_ENABLED(CONFIG_ENC28J60)
  753. static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
  754. .enable_dma = 1,
  755. };
  756. #endif
  757. #if IS_ENABLED(CONFIG_ADF702X)
  758. #include <linux/spi/adf702x.h>
  759. #define TXREG 0x0160A470
  760. static const u32 adf7021_regs[] = {
  761. 0x09608FA0,
  762. 0x00575011,
  763. 0x00A7F092,
  764. 0x2B141563,
  765. 0x81F29E94,
  766. 0x00003155,
  767. 0x050A4F66,
  768. 0x00000007,
  769. 0x00000008,
  770. 0x000231E9,
  771. 0x3296354A,
  772. 0x891A2B3B,
  773. 0x00000D9C,
  774. 0x0000000D,
  775. 0x0000000E,
  776. 0x0000000F,
  777. };
  778. static struct adf702x_platform_data adf7021_platform_data = {
  779. .regs_base = (void *)SPORT1_TCR1,
  780. .dma_ch_rx = CH_SPORT1_RX,
  781. .dma_ch_tx = CH_SPORT1_TX,
  782. .irq_sport_err = IRQ_SPORT1_ERROR,
  783. .gpio_int_rfs = GPIO_PF8,
  784. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
  785. P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
  786. .adf702x_model = MODEL_ADF7021,
  787. .adf702x_regs = adf7021_regs,
  788. .tx_reg = TXREG,
  789. };
  790. static inline void adf702x_mac_init(void)
  791. {
  792. eth_random_addr(adf7021_platform_data.mac_addr);
  793. }
  794. #else
  795. static inline void adf702x_mac_init(void) {}
  796. #endif
  797. #if IS_ENABLED(CONFIG_TOUCHSCREEN_ADS7846)
  798. #include <linux/spi/ads7846.h>
  799. static int ads7873_get_pendown_state(void)
  800. {
  801. return gpio_get_value(GPIO_PF6);
  802. }
  803. static struct ads7846_platform_data __initdata ad7873_pdata = {
  804. .model = 7873, /* AD7873 */
  805. .x_max = 0xfff,
  806. .y_max = 0xfff,
  807. .x_plate_ohms = 620,
  808. .debounce_max = 1,
  809. .debounce_rep = 0,
  810. .debounce_tol = (~0),
  811. .get_pendown_state = ads7873_get_pendown_state,
  812. };
  813. #endif
  814. #if IS_ENABLED(CONFIG_MTD_DATAFLASH)
  815. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  816. {
  817. .name = "bootloader(spi)",
  818. .size = 0x00040000,
  819. .offset = 0,
  820. .mask_flags = MTD_CAP_ROM
  821. }, {
  822. .name = "linux kernel(spi)",
  823. .size = 0x180000,
  824. .offset = MTDPART_OFS_APPEND,
  825. }, {
  826. .name = "file system(spi)",
  827. .size = MTDPART_SIZ_FULL,
  828. .offset = MTDPART_OFS_APPEND,
  829. }
  830. };
  831. static struct flash_platform_data bfin_spi_dataflash_data = {
  832. .name = "SPI Dataflash",
  833. .parts = bfin_spi_dataflash_partitions,
  834. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  835. };
  836. /* DataFlash chip */
  837. static struct bfin5xx_spi_chip data_flash_chip_info = {
  838. .enable_dma = 0, /* use dma transfer with this chip*/
  839. };
  840. #endif
  841. #if IS_ENABLED(CONFIG_AD7476)
  842. static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
  843. .enable_dma = 0, /* use dma transfer with this chip*/
  844. };
  845. #endif
  846. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  847. #if IS_ENABLED(CONFIG_MTD_M25P80)
  848. {
  849. /* the modalias must be the same as spi device driver name */
  850. .modalias = "m25p80", /* Name of spi_driver for this device */
  851. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  852. .bus_num = 0, /* Framework bus number */
  853. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  854. .platform_data = &bfin_spi_flash_data,
  855. .controller_data = &spi_flash_chip_info,
  856. .mode = SPI_MODE_3,
  857. },
  858. #endif
  859. #if IS_ENABLED(CONFIG_MTD_DATAFLASH)
  860. { /* DataFlash chip */
  861. .modalias = "mtd_dataflash",
  862. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  863. .bus_num = 0, /* Framework bus number */
  864. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  865. .platform_data = &bfin_spi_dataflash_data,
  866. .controller_data = &data_flash_chip_info,
  867. .mode = SPI_MODE_3,
  868. },
  869. #endif
  870. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
  871. {
  872. .modalias = "ad1836",
  873. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  874. .bus_num = 0,
  875. .chip_select = 4,
  876. .platform_data = "ad1836", /* only includes chip name for the moment */
  877. .mode = SPI_MODE_3,
  878. },
  879. #endif
  880. #ifdef CONFIG_SND_SOC_AD193X_SPI
  881. {
  882. .modalias = "ad193x",
  883. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  884. .bus_num = 0,
  885. .chip_select = 5,
  886. .mode = SPI_MODE_3,
  887. },
  888. #endif
  889. #if IS_ENABLED(CONFIG_SND_SOC_ADAV80X)
  890. {
  891. .modalias = "adav801",
  892. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  893. .bus_num = 0,
  894. .chip_select = 1,
  895. .mode = SPI_MODE_3,
  896. },
  897. #endif
  898. #if IS_ENABLED(CONFIG_INPUT_AD714X_SPI)
  899. {
  900. .modalias = "ad714x_captouch",
  901. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  902. .irq = IRQ_PF4,
  903. .bus_num = 0,
  904. .chip_select = 5,
  905. .mode = SPI_MODE_3,
  906. .platform_data = &ad7147_spi_platform_data,
  907. },
  908. #endif
  909. #if IS_ENABLED(CONFIG_AD2S90)
  910. {
  911. .modalias = "ad2s90",
  912. .bus_num = 0,
  913. .chip_select = 3, /* change it for your board */
  914. .mode = SPI_MODE_3,
  915. .platform_data = NULL,
  916. .controller_data = &ad2s90_spi_chip_info,
  917. },
  918. #endif
  919. #if IS_ENABLED(CONFIG_AD2S1200)
  920. {
  921. .modalias = "ad2s1200",
  922. .bus_num = 0,
  923. .chip_select = 4, /* CS, change it for your board */
  924. .platform_data = ad2s1200_platform_data,
  925. .controller_data = &ad2s1200_spi_chip_info,
  926. },
  927. #endif
  928. #if IS_ENABLED(CONFIG_AD2S1210)
  929. {
  930. .modalias = "ad2s1210",
  931. .max_speed_hz = 8192000,
  932. .bus_num = 0,
  933. .chip_select = 4, /* CS, change it for your board */
  934. .platform_data = ad2s1210_platform_data,
  935. .controller_data = &ad2s1210_spi_chip_info,
  936. },
  937. #endif
  938. #if IS_ENABLED(CONFIG_SENSORS_AD7314)
  939. {
  940. .modalias = "ad7314",
  941. .max_speed_hz = 1000000,
  942. .bus_num = 0,
  943. .chip_select = 4, /* CS, change it for your board */
  944. .controller_data = &ad7314_spi_chip_info,
  945. .mode = SPI_MODE_1,
  946. },
  947. #endif
  948. #if IS_ENABLED(CONFIG_AD7816)
  949. {
  950. .modalias = "ad7818",
  951. .max_speed_hz = 1000000,
  952. .bus_num = 0,
  953. .chip_select = 4, /* CS, change it for your board */
  954. .platform_data = ad7816_platform_data,
  955. .controller_data = &ad7816_spi_chip_info,
  956. .mode = SPI_MODE_3,
  957. },
  958. #endif
  959. #if IS_ENABLED(CONFIG_ADT7310)
  960. {
  961. .modalias = "adt7310",
  962. .max_speed_hz = 1000000,
  963. .irq = IRQ_PG5, /* CT alarm event. Line 0 */
  964. .bus_num = 0,
  965. .chip_select = 4, /* CS, change it for your board */
  966. .platform_data = adt7310_platform_data,
  967. .controller_data = &adt7310_spi_chip_info,
  968. .mode = SPI_MODE_3,
  969. },
  970. #endif
  971. #if IS_ENABLED(CONFIG_AD7298)
  972. {
  973. .modalias = "ad7298",
  974. .max_speed_hz = 1000000,
  975. .bus_num = 0,
  976. .chip_select = 4, /* CS, change it for your board */
  977. .platform_data = ad7298_platform_data,
  978. .mode = SPI_MODE_3,
  979. },
  980. #endif
  981. #if IS_ENABLED(CONFIG_ADT7316_SPI)
  982. {
  983. .modalias = "adt7316",
  984. .max_speed_hz = 1000000,
  985. .irq = IRQ_PG5, /* interrupt line */
  986. .bus_num = 0,
  987. .chip_select = 4, /* CS, change it for your board */
  988. .platform_data = adt7316_spi_data,
  989. .controller_data = &adt7316_spi_chip_info,
  990. .mode = SPI_MODE_3,
  991. },
  992. #endif
  993. #if IS_ENABLED(CONFIG_MMC_SPI)
  994. {
  995. .modalias = "mmc_spi",
  996. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  997. .bus_num = 0,
  998. .chip_select = 4,
  999. .platform_data = &bfin_mmc_spi_pdata,
  1000. .controller_data = &mmc_spi_chip_info,
  1001. .mode = SPI_MODE_3,
  1002. },
  1003. #endif
  1004. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  1005. {
  1006. .modalias = "ad7877",
  1007. .platform_data = &bfin_ad7877_ts_info,
  1008. .irq = IRQ_PF6,
  1009. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1010. .bus_num = 0,
  1011. .chip_select = 1,
  1012. },
  1013. #endif
  1014. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_SPI)
  1015. {
  1016. .modalias = "ad7879",
  1017. .platform_data = &bfin_ad7879_ts_info,
  1018. .irq = IRQ_PF7,
  1019. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1020. .bus_num = 0,
  1021. .chip_select = 1,
  1022. .mode = SPI_CPHA | SPI_CPOL,
  1023. },
  1024. #endif
  1025. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  1026. {
  1027. .modalias = "spidev",
  1028. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1029. .bus_num = 0,
  1030. .chip_select = 1,
  1031. },
  1032. #endif
  1033. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  1034. {
  1035. .modalias = "bfin-lq035q1-spi",
  1036. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1037. .bus_num = 0,
  1038. .chip_select = 2,
  1039. .mode = SPI_CPHA | SPI_CPOL,
  1040. },
  1041. #endif
  1042. #if IS_ENABLED(CONFIG_ENC28J60)
  1043. {
  1044. .modalias = "enc28j60",
  1045. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1046. .irq = IRQ_PF6,
  1047. .bus_num = 0,
  1048. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1049. .controller_data = &enc28j60_spi_chip_info,
  1050. .mode = SPI_MODE_0,
  1051. },
  1052. #endif
  1053. #if IS_ENABLED(CONFIG_INPUT_ADXL34X_SPI)
  1054. {
  1055. .modalias = "adxl34x",
  1056. .platform_data = &adxl34x_info,
  1057. .irq = IRQ_PF6,
  1058. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1059. .bus_num = 0,
  1060. .chip_select = 2,
  1061. .mode = SPI_MODE_3,
  1062. },
  1063. #endif
  1064. #if IS_ENABLED(CONFIG_ADF702X)
  1065. {
  1066. .modalias = "adf702x",
  1067. .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
  1068. .bus_num = 0,
  1069. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1070. .platform_data = &adf7021_platform_data,
  1071. .mode = SPI_MODE_0,
  1072. },
  1073. #endif
  1074. #if IS_ENABLED(CONFIG_TOUCHSCREEN_ADS7846)
  1075. {
  1076. .modalias = "ads7846",
  1077. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1078. .bus_num = 0,
  1079. .irq = IRQ_PF6,
  1080. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1081. .platform_data = &ad7873_pdata,
  1082. .mode = SPI_MODE_0,
  1083. },
  1084. #endif
  1085. #if IS_ENABLED(CONFIG_AD7476)
  1086. {
  1087. .modalias = "ad7476", /* Name of spi_driver for this device */
  1088. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  1089. .bus_num = 0, /* Framework bus number */
  1090. .chip_select = 1, /* Framework chip select. */
  1091. .platform_data = NULL, /* No spi_driver specific config */
  1092. .controller_data = &spi_ad7476_chip_info,
  1093. .mode = SPI_MODE_3,
  1094. },
  1095. #endif
  1096. #if IS_ENABLED(CONFIG_ADE7753)
  1097. {
  1098. .modalias = "ade7753",
  1099. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1100. .bus_num = 0,
  1101. .chip_select = 1, /* CS, change it for your board */
  1102. .platform_data = NULL, /* No spi_driver specific config */
  1103. .mode = SPI_MODE_1,
  1104. },
  1105. #endif
  1106. #if IS_ENABLED(CONFIG_ADE7754)
  1107. {
  1108. .modalias = "ade7754",
  1109. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1110. .bus_num = 0,
  1111. .chip_select = 1, /* CS, change it for your board */
  1112. .platform_data = NULL, /* No spi_driver specific config */
  1113. .mode = SPI_MODE_1,
  1114. },
  1115. #endif
  1116. #if IS_ENABLED(CONFIG_ADE7758)
  1117. {
  1118. .modalias = "ade7758",
  1119. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1120. .bus_num = 0,
  1121. .chip_select = 1, /* CS, change it for your board */
  1122. .platform_data = NULL, /* No spi_driver specific config */
  1123. .mode = SPI_MODE_1,
  1124. },
  1125. #endif
  1126. #if IS_ENABLED(CONFIG_ADE7759)
  1127. {
  1128. .modalias = "ade7759",
  1129. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1130. .bus_num = 0,
  1131. .chip_select = 1, /* CS, change it for your board */
  1132. .platform_data = NULL, /* No spi_driver specific config */
  1133. .mode = SPI_MODE_1,
  1134. },
  1135. #endif
  1136. #if IS_ENABLED(CONFIG_ADE7854_SPI)
  1137. {
  1138. .modalias = "ade7854",
  1139. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1140. .bus_num = 0,
  1141. .chip_select = 1, /* CS, change it for your board */
  1142. .platform_data = NULL, /* No spi_driver specific config */
  1143. .mode = SPI_MODE_3,
  1144. },
  1145. #endif
  1146. #if IS_ENABLED(CONFIG_ADIS16060)
  1147. {
  1148. .modalias = "adis16060_r",
  1149. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1150. .bus_num = 0,
  1151. .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
  1152. .platform_data = NULL, /* No spi_driver specific config */
  1153. .mode = SPI_MODE_0,
  1154. },
  1155. {
  1156. .modalias = "adis16060_w",
  1157. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1158. .bus_num = 0,
  1159. .chip_select = 2, /* CS for write, change it for your board */
  1160. .platform_data = NULL, /* No spi_driver specific config */
  1161. .mode = SPI_MODE_1,
  1162. },
  1163. #endif
  1164. #if IS_ENABLED(CONFIG_ADIS16130)
  1165. {
  1166. .modalias = "adis16130",
  1167. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1168. .bus_num = 0,
  1169. .chip_select = 1, /* CS for read, change it for your board */
  1170. .platform_data = NULL, /* No spi_driver specific config */
  1171. .mode = SPI_MODE_3,
  1172. },
  1173. #endif
  1174. #if IS_ENABLED(CONFIG_ADIS16201)
  1175. {
  1176. .modalias = "adis16201",
  1177. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1178. .bus_num = 0,
  1179. .chip_select = 5, /* CS, change it for your board */
  1180. .platform_data = NULL, /* No spi_driver specific config */
  1181. .mode = SPI_MODE_3,
  1182. .irq = IRQ_PF4,
  1183. },
  1184. #endif
  1185. #if IS_ENABLED(CONFIG_ADIS16203)
  1186. {
  1187. .modalias = "adis16203",
  1188. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1189. .bus_num = 0,
  1190. .chip_select = 5, /* CS, change it for your board */
  1191. .platform_data = NULL, /* No spi_driver specific config */
  1192. .mode = SPI_MODE_3,
  1193. .irq = IRQ_PF4,
  1194. },
  1195. #endif
  1196. #if IS_ENABLED(CONFIG_ADIS16204)
  1197. {
  1198. .modalias = "adis16204",
  1199. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1200. .bus_num = 0,
  1201. .chip_select = 5, /* CS, change it for your board */
  1202. .platform_data = NULL, /* No spi_driver specific config */
  1203. .mode = SPI_MODE_3,
  1204. .irq = IRQ_PF4,
  1205. },
  1206. #endif
  1207. #if IS_ENABLED(CONFIG_ADIS16209)
  1208. {
  1209. .modalias = "adis16209",
  1210. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1211. .bus_num = 0,
  1212. .chip_select = 5, /* CS, change it for your board */
  1213. .platform_data = NULL, /* No spi_driver specific config */
  1214. .mode = SPI_MODE_3,
  1215. .irq = IRQ_PF4,
  1216. },
  1217. #endif
  1218. #if IS_ENABLED(CONFIG_ADIS16220)
  1219. {
  1220. .modalias = "adis16220",
  1221. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1222. .bus_num = 0,
  1223. .chip_select = 5, /* CS, change it for your board */
  1224. .platform_data = NULL, /* No spi_driver specific config */
  1225. .mode = SPI_MODE_3,
  1226. .irq = IRQ_PF4,
  1227. },
  1228. #endif
  1229. #if IS_ENABLED(CONFIG_ADIS16240)
  1230. {
  1231. .modalias = "adis16240",
  1232. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1233. .bus_num = 0,
  1234. .chip_select = 5, /* CS, change it for your board */
  1235. .platform_data = NULL, /* No spi_driver specific config */
  1236. .mode = SPI_MODE_3,
  1237. .irq = IRQ_PF4,
  1238. },
  1239. #endif
  1240. #if IS_ENABLED(CONFIG_ADIS16260)
  1241. {
  1242. .modalias = "adis16260",
  1243. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1244. .bus_num = 0,
  1245. .chip_select = 5, /* CS, change it for your board */
  1246. .platform_data = NULL, /* No spi_driver specific config */
  1247. .mode = SPI_MODE_3,
  1248. .irq = IRQ_PF4,
  1249. },
  1250. #endif
  1251. #if IS_ENABLED(CONFIG_ADIS16261)
  1252. {
  1253. .modalias = "adis16261",
  1254. .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
  1255. .bus_num = 0,
  1256. .chip_select = 1, /* CS, change it for your board */
  1257. .platform_data = NULL, /* No spi_driver specific config */
  1258. .mode = SPI_MODE_3,
  1259. },
  1260. #endif
  1261. #if IS_ENABLED(CONFIG_ADIS16300)
  1262. {
  1263. .modalias = "adis16300",
  1264. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1265. .bus_num = 0,
  1266. .chip_select = 5, /* CS, change it for your board */
  1267. .platform_data = NULL, /* No spi_driver specific config */
  1268. .mode = SPI_MODE_3,
  1269. .irq = IRQ_PF4,
  1270. },
  1271. #endif
  1272. #if IS_ENABLED(CONFIG_ADIS16350)
  1273. {
  1274. .modalias = "adis16364",
  1275. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1276. .bus_num = 0,
  1277. .chip_select = 5, /* CS, change it for your board */
  1278. .platform_data = NULL, /* No spi_driver specific config */
  1279. .mode = SPI_MODE_3,
  1280. .irq = IRQ_PF4,
  1281. },
  1282. #endif
  1283. #if IS_ENABLED(CONFIG_ADIS16400)
  1284. {
  1285. .modalias = "adis16400",
  1286. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1287. .bus_num = 0,
  1288. .chip_select = 1, /* CS, change it for your board */
  1289. .platform_data = NULL, /* No spi_driver specific config */
  1290. .mode = SPI_MODE_3,
  1291. },
  1292. #endif
  1293. };
  1294. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  1295. /* SPI controller data */
  1296. static struct bfin5xx_spi_master bfin_spi0_info = {
  1297. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  1298. .enable_dma = 1, /* master has the ability to do dma transfer */
  1299. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1300. };
  1301. /* SPI (0) */
  1302. static struct resource bfin_spi0_resource[] = {
  1303. [0] = {
  1304. .start = SPI0_REGBASE,
  1305. .end = SPI0_REGBASE + 0xFF,
  1306. .flags = IORESOURCE_MEM,
  1307. },
  1308. [1] = {
  1309. .start = CH_SPI,
  1310. .end = CH_SPI,
  1311. .flags = IORESOURCE_DMA,
  1312. },
  1313. [2] = {
  1314. .start = IRQ_SPI,
  1315. .end = IRQ_SPI,
  1316. .flags = IORESOURCE_IRQ,
  1317. },
  1318. };
  1319. static struct platform_device bfin_spi0_device = {
  1320. .name = "bfin-spi",
  1321. .id = 0, /* Bus number */
  1322. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1323. .resource = bfin_spi0_resource,
  1324. .dev = {
  1325. .platform_data = &bfin_spi0_info, /* Passed to driver */
  1326. },
  1327. };
  1328. #endif /* spi master and devices */
  1329. #if IS_ENABLED(CONFIG_SPI_BFIN_SPORT)
  1330. /* SPORT SPI controller data */
  1331. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  1332. .num_chipselect = MAX_BLACKFIN_GPIOS,
  1333. .enable_dma = 0, /* master don't support DMA */
  1334. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  1335. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  1336. };
  1337. static struct resource bfin_sport_spi0_resource[] = {
  1338. [0] = {
  1339. .start = SPORT0_TCR1,
  1340. .end = SPORT0_TCR1 + 0xFF,
  1341. .flags = IORESOURCE_MEM,
  1342. },
  1343. [1] = {
  1344. .start = IRQ_SPORT0_ERROR,
  1345. .end = IRQ_SPORT0_ERROR,
  1346. .flags = IORESOURCE_IRQ,
  1347. },
  1348. };
  1349. static struct platform_device bfin_sport_spi0_device = {
  1350. .name = "bfin-sport-spi",
  1351. .id = 1, /* Bus number */
  1352. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  1353. .resource = bfin_sport_spi0_resource,
  1354. .dev = {
  1355. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  1356. },
  1357. };
  1358. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  1359. .num_chipselect = MAX_BLACKFIN_GPIOS,
  1360. .enable_dma = 0, /* master don't support DMA */
  1361. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  1362. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  1363. };
  1364. static struct resource bfin_sport_spi1_resource[] = {
  1365. [0] = {
  1366. .start = SPORT1_TCR1,
  1367. .end = SPORT1_TCR1 + 0xFF,
  1368. .flags = IORESOURCE_MEM,
  1369. },
  1370. [1] = {
  1371. .start = IRQ_SPORT1_ERROR,
  1372. .end = IRQ_SPORT1_ERROR,
  1373. .flags = IORESOURCE_IRQ,
  1374. },
  1375. };
  1376. static struct platform_device bfin_sport_spi1_device = {
  1377. .name = "bfin-sport-spi",
  1378. .id = 2, /* Bus number */
  1379. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  1380. .resource = bfin_sport_spi1_resource,
  1381. .dev = {
  1382. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  1383. },
  1384. };
  1385. #endif /* sport spi master and devices */
  1386. #if IS_ENABLED(CONFIG_FB_BF537_LQ035)
  1387. static struct platform_device bfin_fb_device = {
  1388. .name = "bf537_lq035",
  1389. };
  1390. #endif
  1391. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  1392. #include <asm/bfin-lq035q1.h>
  1393. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  1394. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  1395. .ppi_mode = USE_RGB565_16_BIT_PPI,
  1396. .use_bl = 0, /* let something else control the LCD Blacklight */
  1397. .gpio_bl = GPIO_PF7,
  1398. };
  1399. static struct resource bfin_lq035q1_resources[] = {
  1400. {
  1401. .start = IRQ_PPI_ERROR,
  1402. .end = IRQ_PPI_ERROR,
  1403. .flags = IORESOURCE_IRQ,
  1404. },
  1405. };
  1406. static struct platform_device bfin_lq035q1_device = {
  1407. .name = "bfin-lq035q1",
  1408. .id = -1,
  1409. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  1410. .resource = bfin_lq035q1_resources,
  1411. .dev = {
  1412. .platform_data = &bfin_lq035q1_data,
  1413. },
  1414. };
  1415. #endif
  1416. #if IS_ENABLED(CONFIG_VIDEO_BLACKFIN_CAPTURE)
  1417. #include <linux/videodev2.h>
  1418. #include <media/blackfin/bfin_capture.h>
  1419. #include <media/blackfin/ppi.h>
  1420. static const unsigned short ppi_req[] = {
  1421. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
  1422. P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
  1423. P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  1424. 0,
  1425. };
  1426. static const struct ppi_info ppi_info = {
  1427. .type = PPI_TYPE_PPI,
  1428. .dma_ch = CH_PPI,
  1429. .irq_err = IRQ_PPI_ERROR,
  1430. .base = (void __iomem *)PPI_CONTROL,
  1431. .pin_req = ppi_req,
  1432. };
  1433. #if IS_ENABLED(CONFIG_VIDEO_VS6624)
  1434. static struct v4l2_input vs6624_inputs[] = {
  1435. {
  1436. .index = 0,
  1437. .name = "Camera",
  1438. .type = V4L2_INPUT_TYPE_CAMERA,
  1439. .std = V4L2_STD_UNKNOWN,
  1440. },
  1441. };
  1442. static struct bcap_route vs6624_routes[] = {
  1443. {
  1444. .input = 0,
  1445. .output = 0,
  1446. },
  1447. };
  1448. static const unsigned vs6624_ce_pin = GPIO_PF10;
  1449. static struct bfin_capture_config bfin_capture_data = {
  1450. .card_name = "BF537",
  1451. .inputs = vs6624_inputs,
  1452. .num_inputs = ARRAY_SIZE(vs6624_inputs),
  1453. .routes = vs6624_routes,
  1454. .i2c_adapter_id = 0,
  1455. .board_info = {
  1456. .type = "vs6624",
  1457. .addr = 0x10,
  1458. .platform_data = (void *)&vs6624_ce_pin,
  1459. },
  1460. .ppi_info = &ppi_info,
  1461. .ppi_control = (PACK_EN | DLEN_8 | XFR_TYPE | 0x0020),
  1462. };
  1463. #endif
  1464. static struct platform_device bfin_capture_device = {
  1465. .name = "bfin_capture",
  1466. .dev = {
  1467. .platform_data = &bfin_capture_data,
  1468. },
  1469. };
  1470. #endif
  1471. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  1472. #ifdef CONFIG_SERIAL_BFIN_UART0
  1473. static struct resource bfin_uart0_resources[] = {
  1474. {
  1475. .start = UART0_THR,
  1476. .end = UART0_GCTL+2,
  1477. .flags = IORESOURCE_MEM,
  1478. },
  1479. {
  1480. .start = IRQ_UART0_TX,
  1481. .end = IRQ_UART0_TX,
  1482. .flags = IORESOURCE_IRQ,
  1483. },
  1484. {
  1485. .start = IRQ_UART0_RX,
  1486. .end = IRQ_UART0_RX,
  1487. .flags = IORESOURCE_IRQ,
  1488. },
  1489. {
  1490. .start = IRQ_UART0_ERROR,
  1491. .end = IRQ_UART0_ERROR,
  1492. .flags = IORESOURCE_IRQ,
  1493. },
  1494. {
  1495. .start = CH_UART0_TX,
  1496. .end = CH_UART0_TX,
  1497. .flags = IORESOURCE_DMA,
  1498. },
  1499. {
  1500. .start = CH_UART0_RX,
  1501. .end = CH_UART0_RX,
  1502. .flags = IORESOURCE_DMA,
  1503. },
  1504. #ifdef CONFIG_BFIN_UART0_CTSRTS
  1505. { /* CTS pin */
  1506. .start = GPIO_PG7,
  1507. .end = GPIO_PG7,
  1508. .flags = IORESOURCE_IO,
  1509. },
  1510. { /* RTS pin */
  1511. .start = GPIO_PG6,
  1512. .end = GPIO_PG6,
  1513. .flags = IORESOURCE_IO,
  1514. },
  1515. #endif
  1516. };
  1517. static unsigned short bfin_uart0_peripherals[] = {
  1518. P_UART0_TX, P_UART0_RX, 0
  1519. };
  1520. static struct platform_device bfin_uart0_device = {
  1521. .name = "bfin-uart",
  1522. .id = 0,
  1523. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  1524. .resource = bfin_uart0_resources,
  1525. .dev = {
  1526. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  1527. },
  1528. };
  1529. #endif
  1530. #ifdef CONFIG_SERIAL_BFIN_UART1
  1531. static struct resource bfin_uart1_resources[] = {
  1532. {
  1533. .start = UART1_THR,
  1534. .end = UART1_GCTL+2,
  1535. .flags = IORESOURCE_MEM,
  1536. },
  1537. {
  1538. .start = IRQ_UART1_TX,
  1539. .end = IRQ_UART1_TX,
  1540. .flags = IORESOURCE_IRQ,
  1541. },
  1542. {
  1543. .start = IRQ_UART1_RX,
  1544. .end = IRQ_UART1_RX,
  1545. .flags = IORESOURCE_IRQ,
  1546. },
  1547. {
  1548. .start = IRQ_UART1_ERROR,
  1549. .end = IRQ_UART1_ERROR,
  1550. .flags = IORESOURCE_IRQ,
  1551. },
  1552. {
  1553. .start = CH_UART1_TX,
  1554. .end = CH_UART1_TX,
  1555. .flags = IORESOURCE_DMA,
  1556. },
  1557. {
  1558. .start = CH_UART1_RX,
  1559. .end = CH_UART1_RX,
  1560. .flags = IORESOURCE_DMA,
  1561. },
  1562. };
  1563. static unsigned short bfin_uart1_peripherals[] = {
  1564. P_UART1_TX, P_UART1_RX, 0
  1565. };
  1566. static struct platform_device bfin_uart1_device = {
  1567. .name = "bfin-uart",
  1568. .id = 1,
  1569. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  1570. .resource = bfin_uart1_resources,
  1571. .dev = {
  1572. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  1573. },
  1574. };
  1575. #endif
  1576. #endif
  1577. #if IS_ENABLED(CONFIG_BFIN_SIR)
  1578. #ifdef CONFIG_BFIN_SIR0
  1579. static struct resource bfin_sir0_resources[] = {
  1580. {
  1581. .start = 0xFFC00400,
  1582. .end = 0xFFC004FF,
  1583. .flags = IORESOURCE_MEM,
  1584. },
  1585. {
  1586. .start = IRQ_UART0_RX,
  1587. .end = IRQ_UART0_RX+1,
  1588. .flags = IORESOURCE_IRQ,
  1589. },
  1590. {
  1591. .start = CH_UART0_RX,
  1592. .end = CH_UART0_RX+1,
  1593. .flags = IORESOURCE_DMA,
  1594. },
  1595. };
  1596. static struct platform_device bfin_sir0_device = {
  1597. .name = "bfin_sir",
  1598. .id = 0,
  1599. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  1600. .resource = bfin_sir0_resources,
  1601. };
  1602. #endif
  1603. #ifdef CONFIG_BFIN_SIR1
  1604. static struct resource bfin_sir1_resources[] = {
  1605. {
  1606. .start = 0xFFC02000,
  1607. .end = 0xFFC020FF,
  1608. .flags = IORESOURCE_MEM,
  1609. },
  1610. {
  1611. .start = IRQ_UART1_RX,
  1612. .end = IRQ_UART1_RX+1,
  1613. .flags = IORESOURCE_IRQ,
  1614. },
  1615. {
  1616. .start = CH_UART1_RX,
  1617. .end = CH_UART1_RX+1,
  1618. .flags = IORESOURCE_DMA,
  1619. },
  1620. };
  1621. static struct platform_device bfin_sir1_device = {
  1622. .name = "bfin_sir",
  1623. .id = 1,
  1624. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  1625. .resource = bfin_sir1_resources,
  1626. };
  1627. #endif
  1628. #endif
  1629. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  1630. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  1631. static struct resource bfin_twi0_resource[] = {
  1632. [0] = {
  1633. .start = TWI0_REGBASE,
  1634. .end = TWI0_REGBASE,
  1635. .flags = IORESOURCE_MEM,
  1636. },
  1637. [1] = {
  1638. .start = IRQ_TWI,
  1639. .end = IRQ_TWI,
  1640. .flags = IORESOURCE_IRQ,
  1641. },
  1642. };
  1643. static struct platform_device i2c_bfin_twi_device = {
  1644. .name = "i2c-bfin-twi",
  1645. .id = 0,
  1646. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1647. .resource = bfin_twi0_resource,
  1648. .dev = {
  1649. .platform_data = &bfin_twi0_pins,
  1650. },
  1651. };
  1652. #endif
  1653. #if IS_ENABLED(CONFIG_KEYBOARD_ADP5588)
  1654. static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
  1655. [0] = KEY_GRAVE,
  1656. [1] = KEY_1,
  1657. [2] = KEY_2,
  1658. [3] = KEY_3,
  1659. [4] = KEY_4,
  1660. [5] = KEY_5,
  1661. [6] = KEY_6,
  1662. [7] = KEY_7,
  1663. [8] = KEY_8,
  1664. [9] = KEY_9,
  1665. [10] = KEY_0,
  1666. [11] = KEY_MINUS,
  1667. [12] = KEY_EQUAL,
  1668. [13] = KEY_BACKSLASH,
  1669. [15] = KEY_KP0,
  1670. [16] = KEY_Q,
  1671. [17] = KEY_W,
  1672. [18] = KEY_E,
  1673. [19] = KEY_R,
  1674. [20] = KEY_T,
  1675. [21] = KEY_Y,
  1676. [22] = KEY_U,
  1677. [23] = KEY_I,
  1678. [24] = KEY_O,
  1679. [25] = KEY_P,
  1680. [26] = KEY_LEFTBRACE,
  1681. [27] = KEY_RIGHTBRACE,
  1682. [29] = KEY_KP1,
  1683. [30] = KEY_KP2,
  1684. [31] = KEY_KP3,
  1685. [32] = KEY_A,
  1686. [33] = KEY_S,
  1687. [34] = KEY_D,
  1688. [35] = KEY_F,
  1689. [36] = KEY_G,
  1690. [37] = KEY_H,
  1691. [38] = KEY_J,
  1692. [39] = KEY_K,
  1693. [40] = KEY_L,
  1694. [41] = KEY_SEMICOLON,
  1695. [42] = KEY_APOSTROPHE,
  1696. [43] = KEY_BACKSLASH,
  1697. [45] = KEY_KP4,
  1698. [46] = KEY_KP5,
  1699. [47] = KEY_KP6,
  1700. [48] = KEY_102ND,
  1701. [49] = KEY_Z,
  1702. [50] = KEY_X,
  1703. [51] = KEY_C,
  1704. [52] = KEY_V,
  1705. [53] = KEY_B,
  1706. [54] = KEY_N,
  1707. [55] = KEY_M,
  1708. [56] = KEY_COMMA,
  1709. [57] = KEY_DOT,
  1710. [58] = KEY_SLASH,
  1711. [60] = KEY_KPDOT,
  1712. [61] = KEY_KP7,
  1713. [62] = KEY_KP8,
  1714. [63] = KEY_KP9,
  1715. [64] = KEY_SPACE,
  1716. [65] = KEY_BACKSPACE,
  1717. [66] = KEY_TAB,
  1718. [67] = KEY_KPENTER,
  1719. [68] = KEY_ENTER,
  1720. [69] = KEY_ESC,
  1721. [70] = KEY_DELETE,
  1722. [74] = KEY_KPMINUS,
  1723. [76] = KEY_UP,
  1724. [77] = KEY_DOWN,
  1725. [78] = KEY_RIGHT,
  1726. [79] = KEY_LEFT,
  1727. };
  1728. static struct adp5588_kpad_platform_data adp5588_kpad_data = {
  1729. .rows = 8,
  1730. .cols = 10,
  1731. .keymap = adp5588_keymap,
  1732. .keymapsize = ARRAY_SIZE(adp5588_keymap),
  1733. .repeat = 0,
  1734. };
  1735. #endif
  1736. #if IS_ENABLED(CONFIG_PMIC_ADP5520)
  1737. #include <linux/mfd/adp5520.h>
  1738. /*
  1739. * ADP5520/5501 Backlight Data
  1740. */
  1741. static struct adp5520_backlight_platform_data adp5520_backlight_data = {
  1742. .fade_in = ADP5520_FADE_T_1200ms,
  1743. .fade_out = ADP5520_FADE_T_1200ms,
  1744. .fade_led_law = ADP5520_BL_LAW_LINEAR,
  1745. .en_ambl_sens = 1,
  1746. .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
  1747. .l1_daylight_max = ADP5520_BL_CUR_mA(15),
  1748. .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
  1749. .l2_office_max = ADP5520_BL_CUR_mA(7),
  1750. .l2_office_dim = ADP5520_BL_CUR_mA(0),
  1751. .l3_dark_max = ADP5520_BL_CUR_mA(3),
  1752. .l3_dark_dim = ADP5520_BL_CUR_mA(0),
  1753. .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
  1754. .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
  1755. .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
  1756. .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
  1757. };
  1758. /*
  1759. * ADP5520/5501 LEDs Data
  1760. */
  1761. static struct led_info adp5520_leds[] = {
  1762. {
  1763. .name = "adp5520-led1",
  1764. .default_trigger = "none",
  1765. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  1766. },
  1767. #ifdef ADP5520_EN_ALL_LEDS
  1768. {
  1769. .name = "adp5520-led2",
  1770. .default_trigger = "none",
  1771. .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
  1772. },
  1773. {
  1774. .name = "adp5520-led3",
  1775. .default_trigger = "none",
  1776. .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
  1777. },
  1778. #endif
  1779. };
  1780. static struct adp5520_leds_platform_data adp5520_leds_data = {
  1781. .num_leds = ARRAY_SIZE(adp5520_leds),
  1782. .leds = adp5520_leds,
  1783. .fade_in = ADP5520_FADE_T_600ms,
  1784. .fade_out = ADP5520_FADE_T_600ms,
  1785. .led_on_time = ADP5520_LED_ONT_600ms,
  1786. };
  1787. /*
  1788. * ADP5520 GPIO Data
  1789. */
  1790. static struct adp5520_gpio_platform_data adp5520_gpio_data = {
  1791. .gpio_start = 50,
  1792. .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1793. .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1794. };
  1795. /*
  1796. * ADP5520 Keypad Data
  1797. */
  1798. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  1799. [ADP5520_KEY(0, 0)] = KEY_GRAVE,
  1800. [ADP5520_KEY(0, 1)] = KEY_1,
  1801. [ADP5520_KEY(0, 2)] = KEY_2,
  1802. [ADP5520_KEY(0, 3)] = KEY_3,
  1803. [ADP5520_KEY(1, 0)] = KEY_4,
  1804. [ADP5520_KEY(1, 1)] = KEY_5,
  1805. [ADP5520_KEY(1, 2)] = KEY_6,
  1806. [ADP5520_KEY(1, 3)] = KEY_7,
  1807. [ADP5520_KEY(2, 0)] = KEY_8,
  1808. [ADP5520_KEY(2, 1)] = KEY_9,
  1809. [ADP5520_KEY(2, 2)] = KEY_0,
  1810. [ADP5520_KEY(2, 3)] = KEY_MINUS,
  1811. [ADP5520_KEY(3, 0)] = KEY_EQUAL,
  1812. [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
  1813. [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
  1814. [ADP5520_KEY(3, 3)] = KEY_ENTER,
  1815. };
  1816. static struct adp5520_keys_platform_data adp5520_keys_data = {
  1817. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  1818. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  1819. .keymap = adp5520_keymap,
  1820. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  1821. .repeat = 0,
  1822. };
  1823. /*
  1824. * ADP5520/5501 Multifunction Device Init Data
  1825. */
  1826. static struct adp5520_platform_data adp5520_pdev_data = {
  1827. .backlight = &adp5520_backlight_data,
  1828. .leds = &adp5520_leds_data,
  1829. .gpio = &adp5520_gpio_data,
  1830. .keys = &adp5520_keys_data,
  1831. };
  1832. #endif
  1833. #if IS_ENABLED(CONFIG_GPIO_ADP5588)
  1834. static struct adp5588_gpio_platform_data adp5588_gpio_data = {
  1835. .gpio_start = 50,
  1836. .pullup_dis_mask = 0,
  1837. };
  1838. #endif
  1839. #if IS_ENABLED(CONFIG_BACKLIGHT_ADP8870)
  1840. #include <linux/i2c/adp8870.h>
  1841. static struct led_info adp8870_leds[] = {
  1842. {
  1843. .name = "adp8870-led7",
  1844. .default_trigger = "none",
  1845. .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
  1846. },
  1847. };
  1848. static struct adp8870_backlight_platform_data adp8870_pdata = {
  1849. .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
  1850. ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1851. .pwm_assign = 0, /* 1 = Enables PWM mode */
  1852. .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1853. .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1854. .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1855. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1856. .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1857. .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1858. .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1859. .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1860. .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1861. .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1862. .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1863. .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1864. .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1865. .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1866. .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1867. .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1868. .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1869. .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1870. .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1871. .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1872. .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1873. .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1874. .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1875. .leds = adp8870_leds,
  1876. .num_leds = ARRAY_SIZE(adp8870_leds),
  1877. .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1878. .led_fade_in = ADP8870_FADE_T_600ms,
  1879. .led_fade_out = ADP8870_FADE_T_600ms,
  1880. .led_on_time = ADP8870_LED_ONT_200ms,
  1881. };
  1882. #endif
  1883. #if IS_ENABLED(CONFIG_BACKLIGHT_ADP8860)
  1884. #include <linux/i2c/adp8860.h>
  1885. static struct led_info adp8860_leds[] = {
  1886. {
  1887. .name = "adp8860-led7",
  1888. .default_trigger = "none",
  1889. .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
  1890. },
  1891. };
  1892. static struct adp8860_backlight_platform_data adp8860_pdata = {
  1893. .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
  1894. ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1895. .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1896. .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1897. .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1898. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1899. .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1900. .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1901. .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1902. .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1903. .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1904. .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1905. .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1906. .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1907. .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1908. .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1909. .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1910. .leds = adp8860_leds,
  1911. .num_leds = ARRAY_SIZE(adp8860_leds),
  1912. .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1913. .led_fade_in = ADP8860_FADE_T_600ms,
  1914. .led_fade_out = ADP8860_FADE_T_600ms,
  1915. .led_on_time = ADP8860_LED_ONT_200ms,
  1916. };
  1917. #endif
  1918. #if IS_ENABLED(CONFIG_REGULATOR_AD5398)
  1919. static struct regulator_consumer_supply ad5398_consumer = {
  1920. .supply = "current",
  1921. };
  1922. static struct regulator_init_data ad5398_regulator_data = {
  1923. .constraints = {
  1924. .name = "current range",
  1925. .max_uA = 120000,
  1926. .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
  1927. },
  1928. .num_consumer_supplies = 1,
  1929. .consumer_supplies = &ad5398_consumer,
  1930. };
  1931. #if IS_ENABLED(CONFIG_REGULATOR_VIRTUAL_CONSUMER)
  1932. static struct platform_device ad5398_virt_consumer_device = {
  1933. .name = "reg-virt-consumer",
  1934. .id = 0,
  1935. .dev = {
  1936. .platform_data = "current", /* Passed to driver */
  1937. },
  1938. };
  1939. #endif
  1940. #if IS_ENABLED(CONFIG_REGULATOR_USERSPACE_CONSUMER)
  1941. static struct regulator_bulk_data ad5398_bulk_data = {
  1942. .supply = "current",
  1943. };
  1944. static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
  1945. .name = "ad5398",
  1946. .num_supplies = 1,
  1947. .supplies = &ad5398_bulk_data,
  1948. };
  1949. static struct platform_device ad5398_userspace_consumer_device = {
  1950. .name = "reg-userspace-consumer",
  1951. .id = 0,
  1952. .dev = {
  1953. .platform_data = &ad5398_userspace_comsumer_data,
  1954. },
  1955. };
  1956. #endif
  1957. #endif
  1958. #if IS_ENABLED(CONFIG_ADT7410)
  1959. /* INT bound temperature alarm event. line 1 */
  1960. static unsigned long adt7410_platform_data[2] = {
  1961. IRQ_PG4, IRQF_TRIGGER_LOW,
  1962. };
  1963. #endif
  1964. #if IS_ENABLED(CONFIG_ADT7316_I2C)
  1965. /* INT bound temperature alarm event. line 1 */
  1966. static unsigned long adt7316_i2c_data[2] = {
  1967. IRQF_TRIGGER_LOW, /* interrupt flags */
  1968. GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  1969. };
  1970. #endif
  1971. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  1972. #ifdef CONFIG_SND_SOC_AD193X_I2C
  1973. {
  1974. I2C_BOARD_INFO("ad1937", 0x04),
  1975. },
  1976. #endif
  1977. #if IS_ENABLED(CONFIG_SND_SOC_ADAV80X)
  1978. {
  1979. I2C_BOARD_INFO("adav803", 0x10),
  1980. },
  1981. #endif
  1982. #if IS_ENABLED(CONFIG_INPUT_AD714X_I2C)
  1983. {
  1984. I2C_BOARD_INFO("ad7142_captouch", 0x2C),
  1985. .irq = IRQ_PG5,
  1986. .platform_data = (void *)&ad7142_i2c_platform_data,
  1987. },
  1988. #endif
  1989. #if IS_ENABLED(CONFIG_AD7150)
  1990. {
  1991. I2C_BOARD_INFO("ad7150", 0x48),
  1992. .irq = IRQ_PG5, /* fixme: use real interrupt number */
  1993. },
  1994. #endif
  1995. #if IS_ENABLED(CONFIG_AD7152)
  1996. {
  1997. I2C_BOARD_INFO("ad7152", 0x48),
  1998. },
  1999. #endif
  2000. #if IS_ENABLED(CONFIG_AD774X)
  2001. {
  2002. I2C_BOARD_INFO("ad774x", 0x48),
  2003. },
  2004. #endif
  2005. #if IS_ENABLED(CONFIG_ADE7854_I2C)
  2006. {
  2007. I2C_BOARD_INFO("ade7854", 0x38),
  2008. },
  2009. #endif
  2010. #if IS_ENABLED(CONFIG_SENSORS_LM75)
  2011. {
  2012. I2C_BOARD_INFO("adt75", 0x9),
  2013. .irq = IRQ_PG5,
  2014. },
  2015. #endif
  2016. #if IS_ENABLED(CONFIG_ADT7410)
  2017. {
  2018. I2C_BOARD_INFO("adt7410", 0x48),
  2019. /* CT critical temperature event. line 0 */
  2020. .irq = IRQ_PG5,
  2021. .platform_data = (void *)&adt7410_platform_data,
  2022. },
  2023. #endif
  2024. #if IS_ENABLED(CONFIG_AD7291)
  2025. {
  2026. I2C_BOARD_INFO("ad7291", 0x20),
  2027. .irq = IRQ_PG5,
  2028. },
  2029. #endif
  2030. #if IS_ENABLED(CONFIG_ADT7316_I2C)
  2031. {
  2032. I2C_BOARD_INFO("adt7316", 0x48),
  2033. .irq = IRQ_PG6,
  2034. .platform_data = (void *)&adt7316_i2c_data,
  2035. },
  2036. #endif
  2037. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  2038. {
  2039. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  2040. },
  2041. #endif
  2042. #if IS_ENABLED(CONFIG_INPUT_PCF8574)
  2043. {
  2044. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  2045. .irq = IRQ_PG6,
  2046. },
  2047. #endif
  2048. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_I2C)
  2049. {
  2050. I2C_BOARD_INFO("ad7879", 0x2F),
  2051. .irq = IRQ_PG5,
  2052. .platform_data = (void *)&bfin_ad7879_ts_info,
  2053. },
  2054. #endif
  2055. #if IS_ENABLED(CONFIG_KEYBOARD_ADP5588)
  2056. {
  2057. I2C_BOARD_INFO("adp5588-keys", 0x34),
  2058. .irq = IRQ_PG0,
  2059. .platform_data = (void *)&adp5588_kpad_data,
  2060. },
  2061. #endif
  2062. #if IS_ENABLED(CONFIG_PMIC_ADP5520)
  2063. {
  2064. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  2065. .irq = IRQ_PG0,
  2066. .platform_data = (void *)&adp5520_pdev_data,
  2067. },
  2068. #endif
  2069. #if IS_ENABLED(CONFIG_INPUT_ADXL34X_I2C)
  2070. {
  2071. I2C_BOARD_INFO("adxl34x", 0x53),
  2072. .irq = IRQ_PG3,
  2073. .platform_data = (void *)&adxl34x_info,
  2074. },
  2075. #endif
  2076. #if IS_ENABLED(CONFIG_GPIO_ADP5588)
  2077. {
  2078. I2C_BOARD_INFO("adp5588-gpio", 0x34),
  2079. .platform_data = (void *)&adp5588_gpio_data,
  2080. },
  2081. #endif
  2082. #if IS_ENABLED(CONFIG_FB_BFIN_7393)
  2083. {
  2084. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  2085. },
  2086. #endif
  2087. #if IS_ENABLED(CONFIG_FB_BF537_LQ035)
  2088. {
  2089. I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
  2090. },
  2091. #endif
  2092. #if IS_ENABLED(CONFIG_BACKLIGHT_ADP8870)
  2093. {
  2094. I2C_BOARD_INFO("adp8870", 0x2B),
  2095. .platform_data = (void *)&adp8870_pdata,
  2096. },
  2097. #endif
  2098. #if IS_ENABLED(CONFIG_SND_SOC_ADAU1371)
  2099. {
  2100. I2C_BOARD_INFO("adau1371", 0x1A),
  2101. },
  2102. #endif
  2103. #if IS_ENABLED(CONFIG_SND_SOC_ADAU1761)
  2104. {
  2105. I2C_BOARD_INFO("adau1761", 0x38),
  2106. },
  2107. #endif
  2108. #if IS_ENABLED(CONFIG_SND_SOC_ADAU1361)
  2109. {
  2110. I2C_BOARD_INFO("adau1361", 0x38),
  2111. },
  2112. #endif
  2113. #if IS_ENABLED(CONFIG_SND_SOC_ADAU1701)
  2114. {
  2115. I2C_BOARD_INFO("adau1701", 0x34),
  2116. },
  2117. #endif
  2118. #if IS_ENABLED(CONFIG_AD525X_DPOT)
  2119. {
  2120. I2C_BOARD_INFO("ad5258", 0x18),
  2121. },
  2122. #endif
  2123. #if IS_ENABLED(CONFIG_SND_SOC_SSM2602)
  2124. {
  2125. I2C_BOARD_INFO("ssm2602", 0x1b),
  2126. },
  2127. #endif
  2128. #if IS_ENABLED(CONFIG_REGULATOR_AD5398)
  2129. {
  2130. I2C_BOARD_INFO("ad5398", 0xC),
  2131. .platform_data = (void *)&ad5398_regulator_data,
  2132. },
  2133. #endif
  2134. #if IS_ENABLED(CONFIG_BACKLIGHT_ADP8860)
  2135. {
  2136. I2C_BOARD_INFO("adp8860", 0x2A),
  2137. .platform_data = (void *)&adp8860_pdata,
  2138. },
  2139. #endif
  2140. #if IS_ENABLED(CONFIG_SND_SOC_ADAU1373)
  2141. {
  2142. I2C_BOARD_INFO("adau1373", 0x1A),
  2143. },
  2144. #endif
  2145. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  2146. {
  2147. I2C_BOARD_INFO("ad5252", 0x2e),
  2148. },
  2149. #endif
  2150. };
  2151. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT) \
  2152. || IS_ENABLED(CONFIG_BFIN_SPORT)
  2153. unsigned short bfin_sport0_peripherals[] = {
  2154. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  2155. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  2156. };
  2157. #endif
  2158. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  2159. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2160. static struct resource bfin_sport0_uart_resources[] = {
  2161. {
  2162. .start = SPORT0_TCR1,
  2163. .end = SPORT0_MRCS3+4,
  2164. .flags = IORESOURCE_MEM,
  2165. },
  2166. {
  2167. .start = IRQ_SPORT0_RX,
  2168. .end = IRQ_SPORT0_RX+1,
  2169. .flags = IORESOURCE_IRQ,
  2170. },
  2171. {
  2172. .start = IRQ_SPORT0_ERROR,
  2173. .end = IRQ_SPORT0_ERROR,
  2174. .flags = IORESOURCE_IRQ,
  2175. },
  2176. };
  2177. static struct platform_device bfin_sport0_uart_device = {
  2178. .name = "bfin-sport-uart",
  2179. .id = 0,
  2180. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  2181. .resource = bfin_sport0_uart_resources,
  2182. .dev = {
  2183. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  2184. },
  2185. };
  2186. #endif
  2187. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2188. static struct resource bfin_sport1_uart_resources[] = {
  2189. {
  2190. .start = SPORT1_TCR1,
  2191. .end = SPORT1_MRCS3+4,
  2192. .flags = IORESOURCE_MEM,
  2193. },
  2194. {
  2195. .start = IRQ_SPORT1_RX,
  2196. .end = IRQ_SPORT1_RX+1,
  2197. .flags = IORESOURCE_IRQ,
  2198. },
  2199. {
  2200. .start = IRQ_SPORT1_ERROR,
  2201. .end = IRQ_SPORT1_ERROR,
  2202. .flags = IORESOURCE_IRQ,
  2203. },
  2204. };
  2205. static unsigned short bfin_sport1_peripherals[] = {
  2206. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  2207. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  2208. };
  2209. static struct platform_device bfin_sport1_uart_device = {
  2210. .name = "bfin-sport-uart",
  2211. .id = 1,
  2212. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  2213. .resource = bfin_sport1_uart_resources,
  2214. .dev = {
  2215. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  2216. },
  2217. };
  2218. #endif
  2219. #endif
  2220. #if IS_ENABLED(CONFIG_BFIN_SPORT)
  2221. static struct resource bfin_sport0_resources[] = {
  2222. {
  2223. .start = SPORT0_TCR1,
  2224. .end = SPORT0_MRCS3+4,
  2225. .flags = IORESOURCE_MEM,
  2226. },
  2227. {
  2228. .start = IRQ_SPORT0_RX,
  2229. .end = IRQ_SPORT0_RX+1,
  2230. .flags = IORESOURCE_IRQ,
  2231. },
  2232. {
  2233. .start = IRQ_SPORT0_TX,
  2234. .end = IRQ_SPORT0_TX+1,
  2235. .flags = IORESOURCE_IRQ,
  2236. },
  2237. {
  2238. .start = IRQ_SPORT0_ERROR,
  2239. .end = IRQ_SPORT0_ERROR,
  2240. .flags = IORESOURCE_IRQ,
  2241. },
  2242. {
  2243. .start = CH_SPORT0_TX,
  2244. .end = CH_SPORT0_TX,
  2245. .flags = IORESOURCE_DMA,
  2246. },
  2247. {
  2248. .start = CH_SPORT0_RX,
  2249. .end = CH_SPORT0_RX,
  2250. .flags = IORESOURCE_DMA,
  2251. },
  2252. };
  2253. static struct platform_device bfin_sport0_device = {
  2254. .name = "bfin_sport_raw",
  2255. .id = 0,
  2256. .num_resources = ARRAY_SIZE(bfin_sport0_resources),
  2257. .resource = bfin_sport0_resources,
  2258. .dev = {
  2259. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  2260. },
  2261. };
  2262. #endif
  2263. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  2264. #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2265. /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
  2266. #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2267. #define PATA_INT IRQ_PF5
  2268. static struct pata_platform_info bfin_pata_platform_data = {
  2269. .ioport_shift = 1,
  2270. };
  2271. static struct resource bfin_pata_resources[] = {
  2272. {
  2273. .start = 0x20314020,
  2274. .end = 0x2031403F,
  2275. .flags = IORESOURCE_MEM,
  2276. },
  2277. {
  2278. .start = 0x2031401C,
  2279. .end = 0x2031401F,
  2280. .flags = IORESOURCE_MEM,
  2281. },
  2282. {
  2283. .start = PATA_INT,
  2284. .end = PATA_INT,
  2285. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  2286. },
  2287. };
  2288. #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
  2289. static struct pata_platform_info bfin_pata_platform_data = {
  2290. .ioport_shift = 0,
  2291. };
  2292. /* CompactFlash Storage Card Memory Mapped Addressing
  2293. * /REG = A11 = 1
  2294. */
  2295. static struct resource bfin_pata_resources[] = {
  2296. {
  2297. .start = 0x20211800,
  2298. .end = 0x20211807,
  2299. .flags = IORESOURCE_MEM,
  2300. },
  2301. {
  2302. .start = 0x2021180E, /* Device Ctl */
  2303. .end = 0x2021180E,
  2304. .flags = IORESOURCE_MEM,
  2305. },
  2306. };
  2307. #endif
  2308. static struct platform_device bfin_pata_device = {
  2309. .name = "pata_platform",
  2310. .id = -1,
  2311. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  2312. .resource = bfin_pata_resources,
  2313. .dev = {
  2314. .platform_data = &bfin_pata_platform_data,
  2315. }
  2316. };
  2317. #endif
  2318. static const unsigned int cclk_vlev_datasheet[] =
  2319. {
  2320. VRPAIR(VLEV_085, 250000000),
  2321. VRPAIR(VLEV_090, 376000000),
  2322. VRPAIR(VLEV_095, 426000000),
  2323. VRPAIR(VLEV_100, 426000000),
  2324. VRPAIR(VLEV_105, 476000000),
  2325. VRPAIR(VLEV_110, 476000000),
  2326. VRPAIR(VLEV_115, 476000000),
  2327. VRPAIR(VLEV_120, 500000000),
  2328. VRPAIR(VLEV_125, 533000000),
  2329. VRPAIR(VLEV_130, 600000000),
  2330. };
  2331. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  2332. .tuple_tab = cclk_vlev_datasheet,
  2333. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  2334. .vr_settling_time = 25 /* us */,
  2335. };
  2336. static struct platform_device bfin_dpmc = {
  2337. .name = "bfin dpmc",
  2338. .dev = {
  2339. .platform_data = &bfin_dmpc_vreg_data,
  2340. },
  2341. };
  2342. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S) || \
  2343. IS_ENABLED(CONFIG_SND_BF5XX_AC97)
  2344. #define SPORT_REQ(x) \
  2345. [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
  2346. P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
  2347. static const u16 bfin_snd_pin[][7] = {
  2348. SPORT_REQ(0),
  2349. SPORT_REQ(1),
  2350. };
  2351. static struct bfin_snd_platform_data bfin_snd_data[] = {
  2352. {
  2353. .pin_req = &bfin_snd_pin[0][0],
  2354. },
  2355. {
  2356. .pin_req = &bfin_snd_pin[1][0],
  2357. },
  2358. };
  2359. #define BFIN_SND_RES(x) \
  2360. [x] = { \
  2361. { \
  2362. .start = SPORT##x##_TCR1, \
  2363. .end = SPORT##x##_TCR1, \
  2364. .flags = IORESOURCE_MEM \
  2365. }, \
  2366. { \
  2367. .start = CH_SPORT##x##_RX, \
  2368. .end = CH_SPORT##x##_RX, \
  2369. .flags = IORESOURCE_DMA, \
  2370. }, \
  2371. { \
  2372. .start = CH_SPORT##x##_TX, \
  2373. .end = CH_SPORT##x##_TX, \
  2374. .flags = IORESOURCE_DMA, \
  2375. }, \
  2376. { \
  2377. .start = IRQ_SPORT##x##_ERROR, \
  2378. .end = IRQ_SPORT##x##_ERROR, \
  2379. .flags = IORESOURCE_IRQ, \
  2380. } \
  2381. }
  2382. static struct resource bfin_snd_resources[][4] = {
  2383. BFIN_SND_RES(0),
  2384. BFIN_SND_RES(1),
  2385. };
  2386. #endif
  2387. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  2388. static struct platform_device bfin_i2s_pcm = {
  2389. .name = "bfin-i2s-pcm-audio",
  2390. .id = -1,
  2391. };
  2392. #endif
  2393. #if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
  2394. static struct platform_device bfin_ac97_pcm = {
  2395. .name = "bfin-ac97-pcm-audio",
  2396. .id = -1,
  2397. };
  2398. #endif
  2399. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
  2400. static const char * const ad1836_link[] = {
  2401. "bfin-i2s.0",
  2402. "spi0.4",
  2403. };
  2404. static struct platform_device bfin_ad1836_machine = {
  2405. .name = "bfin-snd-ad1836",
  2406. .id = -1,
  2407. .dev = {
  2408. .platform_data = (void *)ad1836_link,
  2409. },
  2410. };
  2411. #endif
  2412. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD73311)
  2413. static const unsigned ad73311_gpio[] = {
  2414. GPIO_PF4,
  2415. };
  2416. static struct platform_device bfin_ad73311_machine = {
  2417. .name = "bfin-snd-ad73311",
  2418. .id = 1,
  2419. .dev = {
  2420. .platform_data = (void *)ad73311_gpio,
  2421. },
  2422. };
  2423. #endif
  2424. #if IS_ENABLED(CONFIG_SND_SOC_AD73311)
  2425. static struct platform_device bfin_ad73311_codec_device = {
  2426. .name = "ad73311",
  2427. .id = -1,
  2428. };
  2429. #endif
  2430. #if IS_ENABLED(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X)
  2431. static struct platform_device bfin_eval_adav801_device = {
  2432. .name = "bfin-eval-adav801",
  2433. .id = -1,
  2434. };
  2435. #endif
  2436. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_I2S)
  2437. static struct platform_device bfin_i2s = {
  2438. .name = "bfin-i2s",
  2439. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2440. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2441. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2442. .dev = {
  2443. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2444. },
  2445. };
  2446. #endif
  2447. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AC97)
  2448. static struct platform_device bfin_ac97 = {
  2449. .name = "bfin-ac97",
  2450. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2451. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2452. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2453. .dev = {
  2454. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2455. },
  2456. };
  2457. #endif
  2458. #if IS_ENABLED(CONFIG_REGULATOR_FIXED_VOLTAGE)
  2459. #define REGULATOR_ADP122 "adp122"
  2460. #define REGULATOR_ADP122_UV 2500000
  2461. static struct regulator_consumer_supply adp122_consumers = {
  2462. .supply = REGULATOR_ADP122,
  2463. };
  2464. static struct regulator_init_data adp_switch_regulator_data = {
  2465. .constraints = {
  2466. .name = REGULATOR_ADP122,
  2467. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  2468. .min_uV = REGULATOR_ADP122_UV,
  2469. .max_uV = REGULATOR_ADP122_UV,
  2470. .min_uA = 0,
  2471. .max_uA = 300000,
  2472. },
  2473. .num_consumer_supplies = 1, /* only 1 */
  2474. .consumer_supplies = &adp122_consumers,
  2475. };
  2476. static struct fixed_voltage_config adp_switch_pdata = {
  2477. .supply_name = REGULATOR_ADP122,
  2478. .microvolts = REGULATOR_ADP122_UV,
  2479. .gpio = GPIO_PF2,
  2480. .enable_high = 1,
  2481. .enabled_at_boot = 0,
  2482. .init_data = &adp_switch_regulator_data,
  2483. };
  2484. static struct platform_device adp_switch_device = {
  2485. .name = "reg-fixed-voltage",
  2486. .id = 0,
  2487. .dev = {
  2488. .platform_data = &adp_switch_pdata,
  2489. },
  2490. };
  2491. #if IS_ENABLED(CONFIG_REGULATOR_USERSPACE_CONSUMER)
  2492. static struct regulator_bulk_data adp122_bulk_data = {
  2493. .supply = REGULATOR_ADP122,
  2494. };
  2495. static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
  2496. .name = REGULATOR_ADP122,
  2497. .num_supplies = 1,
  2498. .supplies = &adp122_bulk_data,
  2499. };
  2500. static struct platform_device adp122_userspace_consumer_device = {
  2501. .name = "reg-userspace-consumer",
  2502. .id = 0,
  2503. .dev = {
  2504. .platform_data = &adp122_userspace_comsumer_data,
  2505. },
  2506. };
  2507. #endif
  2508. #endif
  2509. #if IS_ENABLED(CONFIG_IIO_GPIO_TRIGGER)
  2510. static struct resource iio_gpio_trigger_resources[] = {
  2511. [0] = {
  2512. .start = IRQ_PF5,
  2513. .end = IRQ_PF5,
  2514. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  2515. },
  2516. };
  2517. static struct platform_device iio_gpio_trigger = {
  2518. .name = "iio_gpio_trigger",
  2519. .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
  2520. .resource = iio_gpio_trigger_resources,
  2521. };
  2522. #endif
  2523. #if IS_ENABLED(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373)
  2524. static struct platform_device bf5xx_adau1373_device = {
  2525. .name = "bfin-eval-adau1373",
  2526. };
  2527. #endif
  2528. #if IS_ENABLED(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701)
  2529. static struct platform_device bf5xx_adau1701_device = {
  2530. .name = "bfin-eval-adau1701",
  2531. };
  2532. #endif
  2533. static struct platform_device *stamp_devices[] __initdata = {
  2534. &bfin_dpmc,
  2535. #if IS_ENABLED(CONFIG_BFIN_SPORT)
  2536. &bfin_sport0_device,
  2537. #endif
  2538. #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
  2539. &bfin_pcmcia_cf_device,
  2540. #endif
  2541. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  2542. &rtc_device,
  2543. #endif
  2544. #if IS_ENABLED(CONFIG_USB_SL811_HCD)
  2545. &sl811_hcd_device,
  2546. #endif
  2547. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  2548. &isp1362_hcd_device,
  2549. #endif
  2550. #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
  2551. &bfin_isp1760_device,
  2552. #endif
  2553. #if IS_ENABLED(CONFIG_SMC91X)
  2554. &smc91x_device,
  2555. #endif
  2556. #if IS_ENABLED(CONFIG_DM9000)
  2557. &dm9000_device,
  2558. #endif
  2559. #if IS_ENABLED(CONFIG_CAN_BFIN)
  2560. &bfin_can_device,
  2561. #endif
  2562. #if IS_ENABLED(CONFIG_BFIN_MAC)
  2563. &bfin_mii_bus,
  2564. &bfin_mac_device,
  2565. #endif
  2566. #if IS_ENABLED(CONFIG_USB_NET2272)
  2567. &net2272_bfin_device,
  2568. #endif
  2569. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  2570. &bfin_spi0_device,
  2571. #endif
  2572. #if IS_ENABLED(CONFIG_SPI_BFIN_SPORT)
  2573. &bfin_sport_spi0_device,
  2574. &bfin_sport_spi1_device,
  2575. #endif
  2576. #if IS_ENABLED(CONFIG_FB_BF537_LQ035)
  2577. &bfin_fb_device,
  2578. #endif
  2579. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  2580. &bfin_lq035q1_device,
  2581. #endif
  2582. #if IS_ENABLED(CONFIG_VIDEO_BLACKFIN_CAPTURE)
  2583. &bfin_capture_device,
  2584. #endif
  2585. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  2586. #ifdef CONFIG_SERIAL_BFIN_UART0
  2587. &bfin_uart0_device,
  2588. #endif
  2589. #ifdef CONFIG_SERIAL_BFIN_UART1
  2590. &bfin_uart1_device,
  2591. #endif
  2592. #endif
  2593. #if IS_ENABLED(CONFIG_BFIN_SIR)
  2594. #ifdef CONFIG_BFIN_SIR0
  2595. &bfin_sir0_device,
  2596. #endif
  2597. #ifdef CONFIG_BFIN_SIR1
  2598. &bfin_sir1_device,
  2599. #endif
  2600. #endif
  2601. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  2602. &i2c_bfin_twi_device,
  2603. #endif
  2604. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  2605. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2606. &bfin_sport0_uart_device,
  2607. #endif
  2608. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2609. &bfin_sport1_uart_device,
  2610. #endif
  2611. #endif
  2612. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  2613. &bfin_pata_device,
  2614. #endif
  2615. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  2616. &bfin_device_gpiokeys,
  2617. #endif
  2618. #if IS_ENABLED(CONFIG_MTD_NAND_PLATFORM)
  2619. &bfin_async_nand_device,
  2620. #endif
  2621. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  2622. &stamp_flash_device,
  2623. #endif
  2624. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  2625. &bfin_i2s_pcm,
  2626. #endif
  2627. #if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
  2628. &bfin_ac97_pcm,
  2629. #endif
  2630. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
  2631. &bfin_ad1836_machine,
  2632. #endif
  2633. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD73311)
  2634. &bfin_ad73311_machine,
  2635. #endif
  2636. #if IS_ENABLED(CONFIG_SND_SOC_AD73311)
  2637. &bfin_ad73311_codec_device,
  2638. #endif
  2639. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_I2S)
  2640. &bfin_i2s,
  2641. #endif
  2642. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AC97)
  2643. &bfin_ac97,
  2644. #endif
  2645. #if IS_ENABLED(CONFIG_REGULATOR_AD5398)
  2646. #if IS_ENABLED(CONFIG_REGULATOR_VIRTUAL_CONSUMER)
  2647. &ad5398_virt_consumer_device,
  2648. #endif
  2649. #if IS_ENABLED(CONFIG_REGULATOR_USERSPACE_CONSUMER)
  2650. &ad5398_userspace_consumer_device,
  2651. #endif
  2652. #endif
  2653. #if IS_ENABLED(CONFIG_REGULATOR_FIXED_VOLTAGE)
  2654. &adp_switch_device,
  2655. #if IS_ENABLED(CONFIG_REGULATOR_USERSPACE_CONSUMER)
  2656. &adp122_userspace_consumer_device,
  2657. #endif
  2658. #endif
  2659. #if IS_ENABLED(CONFIG_IIO_GPIO_TRIGGER)
  2660. &iio_gpio_trigger,
  2661. #endif
  2662. #if IS_ENABLED(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373)
  2663. &bf5xx_adau1373_device,
  2664. #endif
  2665. #if IS_ENABLED(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701)
  2666. &bf5xx_adau1701_device,
  2667. #endif
  2668. #if IS_ENABLED(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X)
  2669. &bfin_eval_adav801_device,
  2670. #endif
  2671. };
  2672. static int __init net2272_init(void)
  2673. {
  2674. #if IS_ENABLED(CONFIG_USB_NET2272)
  2675. int ret;
  2676. ret = gpio_request(GPIO_PF6, "net2272");
  2677. if (ret)
  2678. return ret;
  2679. /* Reset the USB chip */
  2680. gpio_direction_output(GPIO_PF6, 0);
  2681. mdelay(2);
  2682. gpio_set_value(GPIO_PF6, 1);
  2683. #endif
  2684. return 0;
  2685. }
  2686. static int __init stamp_init(void)
  2687. {
  2688. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  2689. bfin_plat_nand_init();
  2690. adf702x_mac_init();
  2691. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  2692. i2c_register_board_info(0, bfin_i2c_board_info,
  2693. ARRAY_SIZE(bfin_i2c_board_info));
  2694. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  2695. if (net2272_init())
  2696. pr_warning("unable to configure net2272; it probably won't work\n");
  2697. return 0;
  2698. }
  2699. arch_initcall(stamp_init);
  2700. static struct platform_device *stamp_early_devices[] __initdata = {
  2701. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  2702. #ifdef CONFIG_SERIAL_BFIN_UART0
  2703. &bfin_uart0_device,
  2704. #endif
  2705. #ifdef CONFIG_SERIAL_BFIN_UART1
  2706. &bfin_uart1_device,
  2707. #endif
  2708. #endif
  2709. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  2710. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2711. &bfin_sport0_uart_device,
  2712. #endif
  2713. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2714. &bfin_sport1_uart_device,
  2715. #endif
  2716. #endif
  2717. };
  2718. void __init native_machine_early_platform_add_devices(void)
  2719. {
  2720. printk(KERN_INFO "register early platform devices\n");
  2721. early_platform_add_devices(stamp_early_devices,
  2722. ARRAY_SIZE(stamp_early_devices));
  2723. }
  2724. void native_machine_restart(char *cmd)
  2725. {
  2726. /* workaround reboot hang when booting from SPI */
  2727. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  2728. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  2729. }
  2730. /*
  2731. * Currently the MAC address is saved in Flash by U-Boot
  2732. */
  2733. #define FLASH_MAC 0x203f0000
  2734. int bfin_get_ether_addr(char *addr)
  2735. {
  2736. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  2737. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  2738. return 0;
  2739. }
  2740. EXPORT_SYMBOL(bfin_get_ether_addr);