head.S 8.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240
  1. /*
  2. * head.S - Common startup code for 68000 core based CPU's
  3. *
  4. * 2012.10.21, Luis Alves <ljalvs@gmail.com>, Single head.S file for all
  5. * 68000 core based CPU's. Based on the sources from:
  6. * Coldfire by Greg Ungerer <gerg@snapgear.com>
  7. * 68328 by D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
  8. * Kenneth Albanowski <kjahds@kjahds.com>,
  9. * The Silver Hammer Group, Ltd.
  10. *
  11. */
  12. #include <linux/linkage.h>
  13. #include <linux/init.h>
  14. #include <asm/asm-offsets.h>
  15. #include <asm/thread_info.h>
  16. /*****************************************************************************
  17. * UCSIMM and UCDIMM use CONFIG_MEMORY_RESERVE to reserve some RAM
  18. *****************************************************************************/
  19. #ifdef CONFIG_MEMORY_RESERVE
  20. #define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)-(CONFIG_MEMORY_RESERVE*0x100000)
  21. #else
  22. #define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)
  23. #endif
  24. /*****************************************************************************/
  25. .global _start
  26. .global _rambase
  27. .global _ramvec
  28. .global _ramstart
  29. .global _ramend
  30. #if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD)
  31. .global bootlogo_bits
  32. #endif
  33. /* Defining DEBUG_HEAD_CODE, serial port in 68x328 is inited */
  34. /* #define DEBUG_HEAD_CODE */
  35. #undef DEBUG_HEAD_CODE
  36. .data
  37. /*****************************************************************************
  38. * RAM setup pointers. Used by the kernel to determine RAM location and size.
  39. *****************************************************************************/
  40. _rambase:
  41. .long 0
  42. _ramvec:
  43. .long 0
  44. _ramstart:
  45. .long 0
  46. _ramend:
  47. .long 0
  48. __HEAD
  49. /*****************************************************************************
  50. * Entry point, where all begins!
  51. *****************************************************************************/
  52. _start:
  53. /* Pilot need this specific signature at the start of ROM */
  54. #ifdef CONFIG_PILOT
  55. .byte 0x4e, 0xfa, 0x00, 0x0a /* bra opcode (jmp 10 bytes) */
  56. .byte 'b', 'o', 'o', 't'
  57. .word 10000
  58. nop
  59. moveq #0, %d0
  60. movew %d0, 0xfffff618 /* Watchdog off */
  61. movel #0x00011f07, 0xfffff114 /* CS A1 Mask */
  62. #endif /* CONFIG_PILOT */
  63. movew #0x2700, %sr /* disable all interrupts */
  64. /*****************************************************************************
  65. * Setup PLL and wait for it to settle (in 68x328 cpu's).
  66. * Also, if enabled, init serial port.
  67. *****************************************************************************/
  68. #if defined(CONFIG_M68328) || \
  69. defined(CONFIG_M68EZ328) || \
  70. defined(CONFIG_M68VZ328)
  71. /* Serial port setup. Should only be needed if debugging this startup code. */
  72. #ifdef DEBUG_HEAD_CODE
  73. movew #0x0800, 0xfffff906 /* Ignore CTS */
  74. movew #0x010b, 0xfffff902 /* BAUD to 9600 */
  75. movew #0xe100, 0xfffff900 /* enable */
  76. #endif /* DEBUG_HEAD */
  77. #ifdef CONFIG_PILOT
  78. movew #0x2410, 0xfffff200 /* PLLCR */
  79. #else
  80. movew #0x2400, 0xfffff200 /* PLLCR */
  81. #endif
  82. movew #0x0123, 0xfffff202 /* PLLFSR */
  83. moveq #0, %d0
  84. movew #16384, %d0 /* PLL settle wait loop */
  85. _pll_settle:
  86. subw #1, %d0
  87. bne _pll_settle
  88. #endif /* CONFIG_M68x328 */
  89. /*****************************************************************************
  90. * If running kernel from ROM some specific initialization has to be done.
  91. * (Assuming that everything is already init'ed when running from RAM)
  92. *****************************************************************************/
  93. #ifdef CONFIG_ROMKERNEL
  94. /*****************************************************************************
  95. * Init chip registers (uCsimm specific)
  96. *****************************************************************************/
  97. #ifdef CONFIG_UCSIMM
  98. moveb #0x00, 0xfffffb0b /* Watchdog off */
  99. moveb #0x10, 0xfffff000 /* SCR */
  100. moveb #0x00, 0xfffff40b /* enable chip select */
  101. moveb #0x00, 0xfffff423 /* enable /DWE */
  102. moveb #0x08, 0xfffffd0d /* disable hardmap */
  103. moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
  104. movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
  105. movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
  106. movew #0x8f00, 0xfffffc00 /* DRAM configuration */
  107. movew #0x9667, 0xfffffc02 /* DRAM control */
  108. movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
  109. movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
  110. moveb #0x40, 0xfffff300 /* IVR */
  111. movel #0x007FFFFF, %d0 /* IMR */
  112. movel %d0, 0xfffff304
  113. moveb 0xfffff42b, %d0
  114. andb #0xe0, %d0
  115. moveb %d0, 0xfffff42b
  116. #endif
  117. /*****************************************************************************
  118. * Init LCD controller.
  119. * (Assuming that LCD controller is already init'ed when running from RAM)
  120. *****************************************************************************/
  121. #ifdef CONFIG_INIT_LCD
  122. #ifdef CONFIG_PILOT
  123. moveb #0, 0xfffffA27 /* LCKCON */
  124. movel #_start, 0xfffffA00 /* LSSA */
  125. moveb #0xa, 0xfffffA05 /* LVPW */
  126. movew #0x9f, 0xFFFFFa08 /* LXMAX */
  127. movew #0x9f, 0xFFFFFa0a /* LYMAX */
  128. moveb #9, 0xfffffa29 /* LBAR */
  129. moveb #0, 0xfffffa25 /* LPXCD */
  130. moveb #0x04, 0xFFFFFa20 /* LPICF */
  131. moveb #0x58, 0xfffffA27 /* LCKCON */
  132. moveb #0x85, 0xfffff429 /* PFDATA */
  133. moveb #0xd8, 0xfffffA27 /* LCKCON */
  134. moveb #0xc5, 0xfffff429 /* PFDATA */
  135. moveb #0xd5, 0xfffff429 /* PFDATA */
  136. movel #bootlogo_bits, 0xFFFFFA00 /* LSSA */
  137. moveb #10, 0xFFFFFA05 /* LVPW */
  138. movew #160, 0xFFFFFA08 /* LXMAX */
  139. movew #160, 0xFFFFFA0A /* LYMAX */
  140. #else /* CONFIG_PILOT */
  141. movel #bootlogo_bits, 0xfffffA00 /* LSSA */
  142. moveb #0x28, 0xfffffA05 /* LVPW */
  143. movew #0x280, 0xFFFFFa08 /* LXMAX */
  144. movew #0x1df, 0xFFFFFa0a /* LYMAX */
  145. moveb #0, 0xfffffa29 /* LBAR */
  146. moveb #0, 0xfffffa25 /* LPXCD */
  147. moveb #0x08, 0xFFFFFa20 /* LPICF */
  148. moveb #0x01, 0xFFFFFA21 /* -ve pol */
  149. moveb #0x81, 0xfffffA27 /* LCKCON */
  150. movew #0xff00, 0xfffff412 /* LCD pins */
  151. #endif /* CONFIG_PILOT */
  152. #endif /* CONFIG_INIT_LCD */
  153. /*****************************************************************************
  154. * Kernel is running from FLASH/ROM (XIP)
  155. * Copy init text & data to RAM
  156. *****************************************************************************/
  157. moveal #_etext, %a0
  158. moveal #_sdata, %a1
  159. moveal #__bss_start, %a2
  160. _copy_initmem:
  161. movel %a0@+, %a1@+
  162. cmpal %a1, %a2
  163. bhi _copy_initmem
  164. #endif /* CONFIG_ROMKERNEL */
  165. /*****************************************************************************
  166. * Setup basic memory information for kernel
  167. *****************************************************************************/
  168. movel #CONFIG_VECTORBASE,_ramvec /* set vector base location */
  169. movel #CONFIG_RAMBASE,_rambase /* set the base of RAM */
  170. movel #RAMEND, _ramend /* set end ram addr */
  171. lea __bss_stop,%a1
  172. movel %a1,_ramstart
  173. /*****************************************************************************
  174. * If the kernel is in RAM, move romfs to right above bss and
  175. * adjust _ramstart to where romfs ends.
  176. *
  177. * (Do this only if CONFIG_MTD_UCLINUX is true)
  178. *****************************************************************************/
  179. #if defined(CONFIG_ROMFS_FS) && defined(CONFIG_RAMKERNEL) && \
  180. defined(CONFIG_MTD_UCLINUX)
  181. lea __bss_start, %a0 /* get start of bss */
  182. lea __bss_stop, %a1 /* set up destination */
  183. movel %a0, %a2 /* copy of bss start */
  184. movel 8(%a0), %d0 /* get size of ROMFS */
  185. addql #8, %d0 /* allow for rounding */
  186. andl #0xfffffffc, %d0 /* whole words */
  187. addl %d0, %a0 /* copy from end */
  188. addl %d0, %a1 /* copy from end */
  189. movel %a1, _ramstart /* set start of ram */
  190. _copy_romfs:
  191. movel -(%a0), -(%a1) /* copy dword */
  192. cmpl %a0, %a2 /* check if at end */
  193. bne _copy_romfs
  194. #endif /* CONFIG_ROMFS_FS && CONFIG_RAMKERNEL && CONFIG_MTD_UCLINUX */
  195. /*****************************************************************************
  196. * Clear bss region
  197. *****************************************************************************/
  198. lea __bss_start, %a0 /* get start of bss */
  199. lea __bss_stop, %a1 /* get end of bss */
  200. _clear_bss:
  201. movel #0, (%a0)+ /* clear each word */
  202. cmpl %a0, %a1 /* check if at end */
  203. bne _clear_bss
  204. /*****************************************************************************
  205. * Load the current task pointer and stack.
  206. *****************************************************************************/
  207. lea init_thread_union,%a0
  208. lea THREAD_SIZE(%a0),%sp
  209. jsr start_kernel /* start Linux kernel */
  210. _exit:
  211. jmp _exit /* should never get here */