Kconfig.cpu 12 KB

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  1. comment "Processor Type"
  2. choice
  3. prompt "CPU family support"
  4. default M68KCLASSIC if MMU
  5. default COLDFIRE if !MMU
  6. help
  7. The Freescale (was Motorola) M68K family of processors implements
  8. the full 68000 processor instruction set.
  9. The Freescale ColdFire family of processors is a modern derivative
  10. of the 68000 processor family. They are mainly targeted at embedded
  11. applications, and are all System-On-Chip (SOC) devices, as opposed
  12. to stand alone CPUs. They implement a subset of the original 68000
  13. processor instruction set.
  14. If you anticipate running this kernel on a computer with a classic
  15. MC68xxx processor, select M68KCLASSIC.
  16. If you anticipate running this kernel on a computer with a ColdFire
  17. processor, select COLDFIRE.
  18. config M68KCLASSIC
  19. bool "Classic M68K CPU family support"
  20. config COLDFIRE
  21. bool "Coldfire CPU family support"
  22. select ARCH_REQUIRE_GPIOLIB
  23. select ARCH_HAVE_CUSTOM_GPIO_H
  24. select CPU_HAS_NO_BITFIELDS
  25. select CPU_HAS_NO_MULDIV64
  26. select GENERIC_CSUM
  27. select HAVE_CLK
  28. endchoice
  29. if M68KCLASSIC
  30. config M68000
  31. bool "MC68000"
  32. depends on !MMU
  33. select CPU_HAS_NO_BITFIELDS
  34. select CPU_HAS_NO_MULDIV64
  35. select CPU_HAS_NO_UNALIGNED
  36. select GENERIC_CSUM
  37. help
  38. The Freescale (was Motorola) 68000 CPU is the first generation of
  39. the well known M68K family of processors. The CPU core as well as
  40. being available as a stand alone CPU was also used in many
  41. System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  42. a paging MMU.
  43. config MCPU32
  44. bool
  45. select CPU_HAS_NO_BITFIELDS
  46. select CPU_HAS_NO_UNALIGNED
  47. help
  48. The Freescale (was then Motorola) CPU32 is a CPU core that is
  49. based on the 68020 processor. For the most part it is used in
  50. System-On-Chip parts, and does not contain a paging MMU.
  51. config M68020
  52. bool "68020 support"
  53. depends on MMU
  54. select CPU_HAS_ADDRESS_SPACES
  55. help
  56. If you anticipate running this kernel on a computer with a MC68020
  57. processor, say Y. Otherwise, say N. Note that the 68020 requires a
  58. 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  59. Sun 3, which provides its own version.
  60. config M68030
  61. bool "68030 support"
  62. depends on MMU && !MMU_SUN3
  63. select CPU_HAS_ADDRESS_SPACES
  64. help
  65. If you anticipate running this kernel on a computer with a MC68030
  66. processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  67. work, as it does not include an MMU (Memory Management Unit).
  68. config M68040
  69. bool "68040 support"
  70. depends on MMU && !MMU_SUN3
  71. select CPU_HAS_ADDRESS_SPACES
  72. help
  73. If you anticipate running this kernel on a computer with a MC68LC040
  74. or MC68040 processor, say Y. Otherwise, say N. Note that an
  75. MC68EC040 will not work, as it does not include an MMU (Memory
  76. Management Unit).
  77. config M68060
  78. bool "68060 support"
  79. depends on MMU && !MMU_SUN3
  80. select CPU_HAS_ADDRESS_SPACES
  81. help
  82. If you anticipate running this kernel on a computer with a MC68060
  83. processor, say Y. Otherwise, say N.
  84. config M68328
  85. bool "MC68328"
  86. depends on !MMU
  87. select M68000
  88. help
  89. Motorola 68328 processor support.
  90. config M68EZ328
  91. bool "MC68EZ328"
  92. depends on !MMU
  93. select M68000
  94. help
  95. Motorola 68EX328 processor support.
  96. config M68VZ328
  97. bool "MC68VZ328"
  98. depends on !MMU
  99. select M68000
  100. help
  101. Motorola 68VZ328 processor support.
  102. config M68360
  103. bool "MC68360"
  104. depends on !MMU
  105. select MCPU32
  106. help
  107. Motorola 68360 processor support.
  108. endif # M68KCLASSIC
  109. if COLDFIRE
  110. choice
  111. prompt "ColdFire SoC type"
  112. default M520x
  113. help
  114. Select the type of ColdFire System-on-Chip (SoC) that you want
  115. to build for.
  116. config M5206
  117. bool "MCF5206"
  118. depends on !MMU
  119. select COLDFIRE_SW_A7
  120. select HAVE_MBAR
  121. help
  122. Motorola ColdFire 5206 processor support.
  123. config M5206e
  124. bool "MCF5206e"
  125. depends on !MMU
  126. select COLDFIRE_SW_A7
  127. select HAVE_MBAR
  128. help
  129. Motorola ColdFire 5206e processor support.
  130. config M520x
  131. bool "MCF520x"
  132. depends on !MMU
  133. select GENERIC_CLOCKEVENTS
  134. select HAVE_CACHE_SPLIT
  135. help
  136. Freescale Coldfire 5207/5208 processor support.
  137. config M523x
  138. bool "MCF523x"
  139. depends on !MMU
  140. select GENERIC_CLOCKEVENTS
  141. select HAVE_CACHE_SPLIT
  142. select HAVE_IPSBAR
  143. help
  144. Freescale Coldfire 5230/1/2/4/5 processor support
  145. config M5249
  146. bool "MCF5249"
  147. depends on !MMU
  148. select COLDFIRE_SW_A7
  149. select HAVE_MBAR
  150. help
  151. Motorola ColdFire 5249 processor support.
  152. config M525x
  153. bool "MCF525x"
  154. depends on !MMU
  155. select COLDFIRE_SW_A7
  156. select HAVE_MBAR
  157. help
  158. Freescale (Motorola) Coldfire 5251/5253 processor support.
  159. config M5271
  160. bool "MCF5271"
  161. depends on !MMU
  162. select M527x
  163. select HAVE_CACHE_SPLIT
  164. select HAVE_IPSBAR
  165. select GENERIC_CLOCKEVENTS
  166. help
  167. Freescale (Motorola) ColdFire 5270/5271 processor support.
  168. config M5272
  169. bool "MCF5272"
  170. depends on !MMU
  171. select COLDFIRE_SW_A7
  172. select HAVE_MBAR
  173. help
  174. Motorola ColdFire 5272 processor support.
  175. config M5275
  176. bool "MCF5275"
  177. depends on !MMU
  178. select M527x
  179. select HAVE_CACHE_SPLIT
  180. select HAVE_IPSBAR
  181. select GENERIC_CLOCKEVENTS
  182. help
  183. Freescale (Motorola) ColdFire 5274/5275 processor support.
  184. config M528x
  185. bool "MCF528x"
  186. depends on !MMU
  187. select GENERIC_CLOCKEVENTS
  188. select HAVE_CACHE_SPLIT
  189. select HAVE_IPSBAR
  190. help
  191. Motorola ColdFire 5280/5282 processor support.
  192. config M5307
  193. bool "MCF5307"
  194. depends on !MMU
  195. select COLDFIRE_SW_A7
  196. select HAVE_CACHE_CB
  197. select HAVE_MBAR
  198. help
  199. Motorola ColdFire 5307 processor support.
  200. config M532x
  201. bool "MCF532x"
  202. depends on !MMU
  203. select M53xx
  204. select HAVE_CACHE_CB
  205. help
  206. Freescale (Motorola) ColdFire 532x processor support.
  207. config M537x
  208. bool "MCF537x"
  209. depends on !MMU
  210. select M53xx
  211. select HAVE_CACHE_CB
  212. help
  213. Freescale ColdFire 537x processor support.
  214. config M5407
  215. bool "MCF5407"
  216. depends on !MMU
  217. select COLDFIRE_SW_A7
  218. select HAVE_CACHE_CB
  219. select HAVE_MBAR
  220. help
  221. Motorola ColdFire 5407 processor support.
  222. config M547x
  223. bool "MCF547x"
  224. select M54xx
  225. select MMU_COLDFIRE if MMU
  226. select HAVE_CACHE_CB
  227. select HAVE_MBAR
  228. help
  229. Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
  230. config M548x
  231. bool "MCF548x"
  232. select MMU_COLDFIRE if MMU
  233. select M54xx
  234. select HAVE_CACHE_CB
  235. select HAVE_MBAR
  236. help
  237. Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
  238. config M5441x
  239. bool "MCF5441x"
  240. depends on !MMU
  241. select GENERIC_CLOCKEVENTS
  242. select HAVE_CACHE_CB
  243. help
  244. Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
  245. endchoice
  246. config M527x
  247. bool
  248. config M53xx
  249. bool
  250. config M54xx
  251. bool
  252. endif # COLDFIRE
  253. comment "Processor Specific Options"
  254. config M68KFPU_EMU
  255. bool "Math emulation support"
  256. depends on MMU
  257. help
  258. At some point in the future, this will cause floating-point math
  259. instructions to be emulated by the kernel on machines that lack a
  260. floating-point math coprocessor. Thrill-seekers and chronically
  261. sleep-deprived psychotic hacker types can say Y now, everyone else
  262. should probably wait a while.
  263. config M68KFPU_EMU_EXTRAPREC
  264. bool "Math emulation extra precision"
  265. depends on M68KFPU_EMU
  266. help
  267. The fpu uses normally a few bit more during calculations for
  268. correct rounding, the emulator can (often) do the same but this
  269. extra calculation can cost quite some time, so you can disable
  270. it here. The emulator will then "only" calculate with a 64 bit
  271. mantissa and round slightly incorrect, what is more than enough
  272. for normal usage.
  273. config M68KFPU_EMU_ONLY
  274. bool "Math emulation only kernel"
  275. depends on M68KFPU_EMU
  276. help
  277. This option prevents any floating-point instructions from being
  278. compiled into the kernel, thereby the kernel doesn't save any
  279. floating point context anymore during task switches, so this
  280. kernel will only be usable on machines without a floating-point
  281. math coprocessor. This makes the kernel a bit faster as no tests
  282. needs to be executed whether a floating-point instruction in the
  283. kernel should be executed or not.
  284. config ADVANCED
  285. bool "Advanced configuration options"
  286. depends on MMU
  287. ---help---
  288. This gives you access to some advanced options for the CPU. The
  289. defaults should be fine for most users, but these options may make
  290. it possible for you to improve performance somewhat if you know what
  291. you are doing.
  292. Note that the answer to this question won't directly affect the
  293. kernel: saying N will just cause the configurator to skip all
  294. the questions about these options.
  295. Most users should say N to this question.
  296. config RMW_INSNS
  297. bool "Use read-modify-write instructions"
  298. depends on ADVANCED
  299. ---help---
  300. This allows to use certain instructions that work with indivisible
  301. read-modify-write bus cycles. While this is faster than the
  302. workaround of disabling interrupts, it can conflict with DMA
  303. ( = direct memory access) on many Amiga systems, and it is also said
  304. to destabilize other machines. It is very likely that this will
  305. cause serious problems on any Amiga or Atari Medusa if set. The only
  306. configuration where it should work are 68030-based Ataris, where it
  307. apparently improves performance. But you've been warned! Unless you
  308. really know what you are doing, say N. Try Y only if you're quite
  309. adventurous.
  310. config SINGLE_MEMORY_CHUNK
  311. bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
  312. depends on MMU
  313. default y if SUN3
  314. select NEED_MULTIPLE_NODES
  315. help
  316. Ignore all but the first contiguous chunk of physical memory for VM
  317. purposes. This will save a few bytes kernel size and may speed up
  318. some operations. Say N if not sure.
  319. config ARCH_DISCONTIGMEM_ENABLE
  320. def_bool MMU && !SINGLE_MEMORY_CHUNK
  321. config 060_WRITETHROUGH
  322. bool "Use write-through caching for 68060 supervisor accesses"
  323. depends on ADVANCED && M68060
  324. ---help---
  325. The 68060 generally uses copyback caching of recently accessed data.
  326. Copyback caching means that memory writes will be held in an on-chip
  327. cache and only written back to memory some time later. Saying Y
  328. here will force supervisor (kernel) accesses to use writethrough
  329. caching. Writethrough caching means that data is written to memory
  330. straight away, so that cache and memory data always agree.
  331. Writethrough caching is less efficient, but is needed for some
  332. drivers on 68060 based systems where the 68060 bus snooping signal
  333. is hardwired on. The 53c710 SCSI driver is known to suffer from
  334. this problem.
  335. config M68K_L2_CACHE
  336. bool
  337. depends on MAC
  338. default y
  339. config NODES_SHIFT
  340. int
  341. default "3"
  342. depends on !SINGLE_MEMORY_CHUNK
  343. config CPU_HAS_NO_BITFIELDS
  344. bool
  345. config CPU_HAS_NO_MULDIV64
  346. bool
  347. config CPU_HAS_NO_UNALIGNED
  348. bool
  349. config CPU_HAS_ADDRESS_SPACES
  350. bool
  351. config FPU
  352. bool
  353. config COLDFIRE_SW_A7
  354. bool
  355. config HAVE_CACHE_SPLIT
  356. bool
  357. config HAVE_CACHE_CB
  358. bool
  359. config HAVE_MBAR
  360. bool
  361. config HAVE_IPSBAR
  362. bool
  363. config CLOCK_FREQ
  364. int "Set the core clock frequency"
  365. default "25000000" if M5206
  366. default "54000000" if M5206e
  367. default "166666666" if M520x
  368. default "140000000" if M5249
  369. default "150000000" if M527x || M523x
  370. default "90000000" if M5307
  371. default "50000000" if M5407
  372. default "266000000" if M54xx
  373. default "66666666"
  374. depends on COLDFIRE
  375. help
  376. Define the CPU clock frequency in use. This is the core clock
  377. frequency, it may or may not be the same as the external clock
  378. crystal fitted to your board. Some processors have an internal
  379. PLL and can have their frequency programmed at run time, others
  380. use internal dividers. In general the kernel won't setup a PLL
  381. if it is fitted (there are some exceptions). This value will be
  382. specific to the exact CPU that you are using.
  383. config OLDMASK
  384. bool "Old mask 5307 (1H55J) silicon"
  385. depends on M5307
  386. help
  387. Build support for the older revision ColdFire 5307 silicon.
  388. Specifically this is the 1H55J mask revision.
  389. if HAVE_CACHE_SPLIT
  390. choice
  391. prompt "Split Cache Configuration"
  392. default CACHE_I
  393. config CACHE_I
  394. bool "Instruction"
  395. help
  396. Use all of the ColdFire CPU cache memory as an instruction cache.
  397. config CACHE_D
  398. bool "Data"
  399. help
  400. Use all of the ColdFire CPU cache memory as a data cache.
  401. config CACHE_BOTH
  402. bool "Both"
  403. help
  404. Split the ColdFire CPU cache, and use half as an instruction cache
  405. and half as a data cache.
  406. endchoice
  407. endif
  408. if HAVE_CACHE_CB
  409. choice
  410. prompt "Data cache mode"
  411. default CACHE_WRITETHRU
  412. config CACHE_WRITETHRU
  413. bool "Write-through"
  414. help
  415. The ColdFire CPU cache is set into Write-through mode.
  416. config CACHE_COPYBACK
  417. bool "Copy-back"
  418. help
  419. The ColdFire CPU cache is set into Copy-back mode.
  420. endchoice
  421. endif