jz4740.dtsi 1.3 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768
  1. #include <dt-bindings/clock/jz4740-cgu.h>
  2. / {
  3. #address-cells = <1>;
  4. #size-cells = <1>;
  5. compatible = "ingenic,jz4740";
  6. cpuintc: interrupt-controller@0 {
  7. #address-cells = <0>;
  8. #interrupt-cells = <1>;
  9. interrupt-controller;
  10. compatible = "mti,cpu-interrupt-controller";
  11. };
  12. intc: interrupt-controller@10001000 {
  13. compatible = "ingenic,jz4740-intc";
  14. reg = <0x10001000 0x14>;
  15. interrupt-controller;
  16. #interrupt-cells = <1>;
  17. interrupt-parent = <&cpuintc>;
  18. interrupts = <2>;
  19. };
  20. ext: ext {
  21. compatible = "fixed-clock";
  22. #clock-cells = <0>;
  23. };
  24. rtc: rtc {
  25. compatible = "fixed-clock";
  26. #clock-cells = <0>;
  27. clock-frequency = <32768>;
  28. };
  29. cgu: jz4740-cgu@10000000 {
  30. compatible = "ingenic,jz4740-cgu";
  31. reg = <0x10000000 0x100>;
  32. clocks = <&ext>, <&rtc>;
  33. clock-names = "ext", "rtc";
  34. #clock-cells = <1>;
  35. };
  36. uart0: serial@10030000 {
  37. compatible = "ingenic,jz4740-uart";
  38. reg = <0x10030000 0x100>;
  39. interrupt-parent = <&intc>;
  40. interrupts = <9>;
  41. clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
  42. clock-names = "baud", "module";
  43. };
  44. uart1: serial@10031000 {
  45. compatible = "ingenic,jz4740-uart";
  46. reg = <0x10031000 0x100>;
  47. interrupt-parent = <&intc>;
  48. interrupts = <8>;
  49. clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
  50. clock-names = "baud", "module";
  51. };
  52. };