pmc.c 2.3 KB

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  1. /*
  2. * arch/powerpc/kernel/pmc.c
  3. *
  4. * Copyright (C) 2004 David Gibson, IBM Corporation.
  5. * Includes code formerly from arch/ppc/kernel/perfmon.c:
  6. * Author: Andy Fleming
  7. * Copyright (c) 2004 Freescale Semiconductor, Inc
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/export.h>
  18. #include <asm/processor.h>
  19. #include <asm/cputable.h>
  20. #include <asm/pmc.h>
  21. #ifndef MMCR0_PMAO
  22. #define MMCR0_PMAO 0
  23. #endif
  24. static void dummy_perf(struct pt_regs *regs)
  25. {
  26. #if defined(CONFIG_FSL_EMB_PERFMON)
  27. mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
  28. #elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
  29. if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
  30. mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO));
  31. #else
  32. mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
  33. #endif
  34. }
  35. static DEFINE_RAW_SPINLOCK(pmc_owner_lock);
  36. static void *pmc_owner_caller; /* mostly for debugging */
  37. perf_irq_t perf_irq = dummy_perf;
  38. int reserve_pmc_hardware(perf_irq_t new_perf_irq)
  39. {
  40. int err = 0;
  41. raw_spin_lock(&pmc_owner_lock);
  42. if (pmc_owner_caller) {
  43. printk(KERN_WARNING "reserve_pmc_hardware: "
  44. "PMC hardware busy (reserved by caller %p)\n",
  45. pmc_owner_caller);
  46. err = -EBUSY;
  47. goto out;
  48. }
  49. pmc_owner_caller = __builtin_return_address(0);
  50. perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
  51. out:
  52. raw_spin_unlock(&pmc_owner_lock);
  53. return err;
  54. }
  55. EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
  56. void release_pmc_hardware(void)
  57. {
  58. raw_spin_lock(&pmc_owner_lock);
  59. WARN_ON(! pmc_owner_caller);
  60. pmc_owner_caller = NULL;
  61. perf_irq = dummy_perf;
  62. raw_spin_unlock(&pmc_owner_lock);
  63. }
  64. EXPORT_SYMBOL_GPL(release_pmc_hardware);
  65. #ifdef CONFIG_PPC64
  66. void power4_enable_pmcs(void)
  67. {
  68. unsigned long hid0;
  69. hid0 = mfspr(SPRN_HID0);
  70. hid0 |= 1UL << (63 - 20);
  71. /* POWER4 requires the following sequence */
  72. asm volatile(
  73. "sync\n"
  74. "mtspr %1, %0\n"
  75. "mfspr %0, %1\n"
  76. "mfspr %0, %1\n"
  77. "mfspr %0, %1\n"
  78. "mfspr %0, %1\n"
  79. "mfspr %0, %1\n"
  80. "mfspr %0, %1\n"
  81. "isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
  82. "memory");
  83. }
  84. #endif /* CONFIG_PPC64 */